DRA790 Datasheet, PDF (275/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
(1) P = output mmc1_clk period in ns
SDR122
SDR121
SDR120
mmc1_clk
SDR126
SDR125
mmc1_cmd
SDR128
SDR127
mmc1_dat[3:0]
SPRS906_TIMING_MMC1_05
Figure 5-79. MMC/SD/SDIO in - High Speed SDR12 - Receiver Mode
SDR122
SDR121
SDR120
mmc1_clk
SDR123
mmc1_cmd
mmc1_dat[3:0]
SDR124
SPRS906_TIMING_MMC1_06
Figure 5-80. MMC/SD/SDIO in - High Speed SDR12 - Transmitter Mode
5.9.6.21.1.4 SDR25, 4-bit data, half-cycle
Table 5-122 and Table 5-123 present Timing requirements and Switching characteristics for MMC1 -
SDR25 in receiver and transmitter mode (see Figure 5-81 and Figure 5-82).
Table 5-122. Timing Requirements for MMC1 - SD Card SDR25 Mode
NO. PARAMETER
SDR25 t_{su(cmdV-clkH)}
3
SDR25 t_h(clkH-cmdV)
4
SDR25 t_su(dV-clkH)
7
SDR25 t_h(clkH-dV)
8
DESCRIPTION
Setup time, mmc1_cmd valid before mmc1_clk rising
clock edge
Hold time, mmc1_cmd valid after mmc1_clk rising
clock edge
Setup time, mmc1_dat[3:0] valid before mmc1_clk
rising clock edge
Hold time, mmc1_dat[3:0] valid after mmc1_clk rising
clock edge
MODE
Pad Loopback Clock
Internal Loopback Clock
MIN
5.3
1.6
5.3
1.6
1.6
MAX UNIT
ns
ns
ns
ns
ns
Table 5-123. Switching Characteristics for MMC1 - SD Card SDR25 Mode
NO. PARAMETER
SDR251 fop(clk)
SDR252 t_w(clkH)
H
SDR252L t_w(clkL)
SDR255 t_d(clkL-cmdV)
DESCRIPTION
Operating frequency, mmc1_clk
Pulse duration, mmc1_clk high
Pulse duration, mmc1_clk low
Delay time, mmc1_clk falling clock edge to mmc1_cmd transition
MIN
0.5 × P-
0.185 ⁽¹⁾
0.5 × P-
0.185 ⁽¹⁾
-8.8
MAX
48
6.6
UNIT
MHz
ns
ns
ns
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Specifications 275