DRA790 Datasheet, PDF (318/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
www.ti.com
Table 5-194. Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Parallel Capture Mode (continued)
BALL
AA3
W2
Y3
AA1
AA4
AB1
BALL NAME
mmc3_dat2
mmc3_dat3
mmc3_dat4
mmc3_dat5
mmc3_dat6
mmc3_dat7
PR2_PRU0_PAR_CAP_MANUAL2
A_DELAY (ps)
G_DELAY (ps)
4040
673
3923
1478
4096
729
3926
1271
4004
929
3963
666
CFG REGISTER
CFG_MMC3_DAT2_IN
CFG_MMC3_DAT3_IN
CFG_MMC3_DAT4_IN
CFG_MMC3_DAT5_IN
CFG_MMC3_DAT6_IN
CFG_MMC3_DAT7_IN
MUXMODE
12
pr2_pru0_gpi6
pr2_pru0_gpi7
pr2_pru0_gpi8
pr2_pru0_gpi9
pr2_pru0_gpi10
pr2_pru0_gpi11
Manual IO Timings Modes must be used to guaranteed some IO timings for PRU-ICSS2 PRU1 IOSET1
Parallel Capture Mode. See Table 5-27 Modes Summary for a list of IO timings requiring the use of
Manual IO Timings Modes. See Table 5-195 Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET1
Parallel Capture Mode for a definition of the Manual modes.
Table 5-195 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
Table 5-195. Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET1 Parallel Capture Mode
BALL
P5
L5
L6
N2
P2
N4
N3
P1
N1
T4
T5
R1
R2
P3
P4
N5
N6
BALL NAME
RMII_MHZ_5
0_CLK
mdio_d
mdio_mclk
rgmii0_rxc
rgmii0_rxctl
rgmii0_rxd0
rgmii0_rxd1
rgmii0_rxd2
rgmii0_rxd3
rgmii0_txc
rgmii0_txctl
rgmii0_txd0
rgmii0_txd1
rgmii0_txd2
rgmii0_txd3
uart3_rxd
uart3_txd
PR2_PRU1_PAR_CAP_MANUAL1
A_DELAY (ps)
G_DELAY (ps)
1717
0
2088
0
1321
0
1287
0
2456
0
0
0
2157
0
2008
0
2271
0
1851
0
1875
0
1685
0
2131
0
1734
0
1764
0
1654
0
1242
0
CFG REGISTER
CFG_RMII_MHZ_50_CLK_IN
CFG_MDIO_D_IN
CFG_MDIO_MCLK_IN
CFG_RGMII0_RXC_IN
CFG_RGMII0_RXCTL_IN
CFG_RGMII0_RXD0_IN
CFG_RGMII0_RXD1_IN
CFG_RGMII0_RXD2_IN
CFG_RGMII0_RXD3_IN
CFG_RGMII0_TXC_IN
CFG_RGMII0_TXCTL_IN
CFG_RGMII0_TXD0_IN
CFG_RGMII0_TXD1_IN
CFG_RGMII0_TXD2_IN
CFG_RGMII0_TXD3_IN
CFG_UART3_RXD_IN
CFG_UART3_TXD_IN
MUXMODE
12
pr2_pru1_gpi2
pr2_pru1_gpi1
pr2_pru1_gpi0
pr2_pru1_gpi11
pr2_pru1_gpi12
pr2_pru1_gpi16
pr2_pru1_gpi15
pr2_pru1_gpi14
pr2_pru1_gpi13
pr2_pru1_gpi5
pr2_pru1_gpi6
pr2_pru1_gpi10
pr2_pru1_gpi9
pr2_pru1_gpi8
pr2_pru1_gpi7
pr2_pru1_gpi3
pr2_pru1_gpi4
Manual IO Timings Modes must be used to guaranteed some IO timings for PRU-ICSS2 PRU1 IOSET2
Parallel Capture Mode. See Table 5-27 Modes Summary for a list of IO timings requiring the use of
Manual IO Timings Modes. See Table 5-196 Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET2
Parallel Capture Mode for a definition of the Manual modes.
Table 5-196 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
318 Specifications
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