DRA790 Datasheet, PDF (256/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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5.9.6.19 GMAC_SW
The three-port gigabit ethernet switch subsystem (GMAC_SW) provides ethernet packet communication
and can be configured as an ethernet switch. It provides the Gigabit Media Independent Interface (G/MII)
in MII mode, Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent
Interface (RMII), and the Management Data Input/Output (MDIO) for physical layer device (PHY)
management.
NOTE
For more information, see the Ethernet Subsystem section of the Device TRM.
NOTE
The Gigabit, Reduced and Media Independent Interface n (n = 0 to 1) are also referred to as
MIIn, RMIIn and RGMIIn.
CAUTION
The I/O Timings provided in this section are valid only if signals within a single
IOSET are used. The IOSETs are defined in Table 5-92, Table 5-95, Table 5-
100 and Table 5-107.
CAUTION
The I/O Timings provided in this section are valid only for some GMAC usage
modes when the corresponding Virtual I/O Timings or Manual I/O Timings are
configured as described in the tables found in this section.
5.9.6.19.1 GMAC MII Timings
Table 5-88 and Figure 5-65 present timing requirements for MIIn in receive operation.
Table 5-88. Timing Requirements for miin_rxclk - MII Operation
NO.
PARAMETER
DESCRIPTION
1
t_{c(RX_CLK)}
Cycle time, miin_rxclk
2
t_{w(RX_CLKH)}
Pulse duration, miin_rxclk high
3
t_{w(RX_CLKL)}
Pulse duration, miin_rxclk low
4
t_{t(RX_CLK)}
Transition time, miin_rxclk
SPEED
MIN
10 Mbps
400
100 Mbps
40
10 Mbps
140
100 Mbps
14
10 Mbps
140
100 Mbps
14
10 Mbps
100 Mbps
MAX
260
26
260
26
3
3
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
256 Specifications
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