DRA790 Datasheet, PDF (311/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
Table 5-183. PRU-ICSS2 IOSETs (EnDAT)⁽¹⁾ (continued)
SIGNALS
IOSET3
IOSET4
BALL
MUX
BALL
MUX
pr2_pru1_endat1_out
N6
13
AC4
13
pr2_pru1_endat1_out_en
T4
13
J25
13
pr2_pru1_endat2_clk
T5
13
J24
13
pr2_pru1_endat2_out
P4
13
C16
13
pr2_pru1_endat2_out_en
P3
13
D14
13
pr2_pru1_endat0_in
R2
12
B14
12
pr2_pru1_endat1_in
R1
12
A18
12
pr2_pru1_endat2_in
N2
12
B17
12
(1) These signals are internally muxed with the PRU GPI/GPO signals. Refer to the PRU chapter in the TRM for more details about the
PRU-ICSS internal wrapper multiplexing.
Table 5-184. PRU-ICSS2 IOSETs (Sigma Delta)⁽¹⁾
SIGNALS
IOSET4
BALL
MUX
PRU-ICSS 2 SD
pr2_pru0_sd0_clk
Y5
12
pr2_pru0_sd0_d
Y6
12
pr2_pru0_sd1_clk
Y2
12
pr2_pru0_sd1_d
Y1
12
pr2_pru0_sd2_clk
Y4
12
pr2_pru0_sd2_d
AA2
12
pr2_pru0_sd3_clk
AA3
12
pr2_pru0_sd3_d
W2
12
pr2_pru0_sd4_clk
Y3
12
pr2_pru0_sd4_d
AA1
12
pr2_pru0_sd5_clk
AA4
12
pr2_pru0_sd5_d
AB1
12
pr2_pru0_sd6_clk
A22
12
pr2_pru0_sd6_d
A23
12
pr2_pru0_sd7_clk
B22
12
pr2_pru0_sd7_d
B23
12
pr2_pru0_sd8_clk
A21
12
pr2_pru0_sd8_d
B21
12
(1) These signals are internally muxed with the PRU GPI/GPO signals. Refer to the PRU chapter in the TRM for more details about the
PRU-ICSS internal wrapper multiplexing.
5.9.6.23.6 PRU-ICSS Manual Functional Mapping
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in
section "Manual IO Timing Modes" of the Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more
information see the Control Module Chapter in the Device TRM.
Manual IO Timings Modes must be used to guaranteed some IO timings for PRU-ICSS1 PRU1 Direct
Input mode. See Table 5-27 Modes Summary for a list of IO timings requiring the use of Manual IO
Timings Modes. See Table 5-185 Manual Functions Mapping for PRU-ICSS1 PRU1 Direct Input mode for
a definition of the Manual modes.
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