DRA790 Datasheet, PDF (122/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
www.ti.com
over operating free-air temperature range (unless otherwise noted) ⁽¹⁾
PARAMETER⁽¹⁾
MIN
MAX
UNIT
V_SUPPLY (Steady-State)
Supply Voltage Ranges (Steady- Core (vdd, vdd_dsp)
-0.3
1.5
V
State)
Analog (vdda_usb1, vdda_usb2,
-0.3
2.0
V
vdda_per, vdda_ddr, vdda_debug,
vdda_mpu_abe, vdda_usb3,
vdda_csi, vdda_core_gmac,
vdda_gpu, dda_hdmi, vdda_pcie,
vdda_video, vdda_osc)
Analog 3.3V (vdda33v_usb1,
vdda33v_usb2)
-0.3
3.8
V
vdds18v, vdds18v_ddr1,
vdds_mlbp, vdds_ddr1
-0.3
2.1
V
vddshv1, vddshv3, vddshv4,
vddshv7-11 (1.8V mode)
-0.3
2.1
V
vddshv1, vddshv3, vddshv4,
-0.3
3.8
V
vddshv7, vddshv9-11 (3.3V mode)
vddshv8 (3.3V mode)
-0.3
3.6
V
V_IO (Steady-State)
Input and Output Voltage Ranges
(Steady-State)
Core I/Os
Analog I/Os (except HDMI)
-0.3
1.5
V
-0.3
2.0
V
HDMI I/Os
-0.3
3.5
V
I/O 1.35V
-0.3
1.65
V
I/O 1.5V
-0.3
1.8
V
1.8V I/Os
-0.3
2.1
V
3.3V I/Os (except those powered by -0.3
3.8
V
vddshv8)
3.3V I/Os (powered by vddshv8)
-0.3
3.6
V
SR
Maximum slew rate, all supplies
10⁵
V/s
V_IO (Transient Overshoot /
Undershoot)
Input and Output Voltage Ranges (Transient Overshoot/Undershoot)
Note: valid for up to 20% of the signal period
0.2 ×
V
VDD ⁽⁴⁾
T_J
Operating junction temperature
Automotive
range
-40
+125
°C
T_STG
Latch-up I-Test
Latch-up OV-Test
Storage temperature range after soldered onto PC Board
-55
+150
°C
I-test⁽⁵⁾, All I/Os (if different levels then one line per level)
-100
100
mA
Over-voltage Test⁽⁶⁾, All supplies (if different levels then one line per level) N/A
1.5 ×
V
Vsupply
max
(1) Stresses beyond those listed as absolute maximum ratings may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those listed under Section 5.4, Recommended Operating
Conditions, is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to VSS, unless otherwise noted.
(3) See I/Os supplied by this power pin in Table 4-1 Pin Attributes
(4) VDD is the voltage on the corresponding power-supply pin(s) for the IO.
(5) Per JEDEC JESD78 at 125°C with specified I/O pin injection current and clamp voltage of 1.5 times maximum recommended I/O
voltage and negative 0.5 times maximum recommended I/O voltage.
(6) Per JEDEC JESD78 at 125°C.
5.2 ESD Ratings
V_ESD Electrostatic discharge
Human-Body model (HBM), per AEC Q100-002⁽¹⁾
Charged-device model (CDM), per AEC
Q100-011
All pins
Corner pins (A1,
A25, AE1, AE25)
VALUE
±1000
±250
±750
UNIT
V
122 Specifications
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