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DRA790 Datasheet, PDF (370/436 Pages) Texas Instruments – Infotainment Applications Processor
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
www.ti.com
Bypass
capacitor
0.1 mf
(minimum)
Stub
inductance
Signal
VCC
Protected
circuit
Interconnection
inductance
Stub
inductance
vcc
Minimize such
inductance by
optimizing layout
Ground
inductance
Stub
inductance
External
protection
VCC
Signal
ESD
strike
Keep distance
between protected
circuit and external
protection
Keep external
protection closed by
connector
SPRS906_PCB_ESD_01
Figure 7-10. Placement Recommendation for an ESD External Protection
NOTE
To ensure normal behavior of the ESD protection (unwanted leakage), it is better to ground
the ESD protection to the board ground rather than any local ground (example isolated shield
or audio ground).
7.2.5.2 Miscellaneous EMC Guidelines to Mitigate ESD Immunity
• Avoid running critical signal traces (clocks, resets, interrupts, control signals, and so forth) near PCB
edges.
• Add high frequency filtering: Decoupling capacitors close to the receivers rather than close to the
drivers to minimize ESD coupling.
• Put a ground (guard) ring around the entire periphery of the PCB to act as a lightning rod.
• Connect the guard ring to the PCB ground plane to provide a low impedance path for ESD-coupled
current on the ring.
• Fill unused portions of the PCB with ground plane.
• Minimize circuit loops between power and ground by using multilayer PCB with dedicated power and
ground planes.
• Shield long line length (strip lines) to minimize radiated ESD.
• Avoid running traces over split ground planes. It is better to use a bridge connecting the two planes in
one area.
370 Applications, Implementation, and Layout
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