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DRA790 Datasheet, PDF (322/436 Pages) Texas Instruments – Infotainment Applications Processor
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
5.9.7.2 Trace Port Interface Unit (TPIU)
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CAUTION
The I/O timings provided in this section are valid only if signals within a single
IOSET are used. The IOSETs are defined in Table 5-202.
5.9.7.2.1 TPIU PLL DDR Mode
Table 5-201 and Figure 5-129 assume testing over the recommended operating conditions and electrical
characteristic conditions below.
NO.
TPIU1
TPIU4
TPIU5
PARAMETER
tc(clk)
td(clk-ctlV)
td(clk-dataV)
Table 5-201. Switching Characteristics for TPIU
DESCRIPTION
Cycle time, TRACECLK period
Skew time, TRACECLK transition to TRACECTL transition
Skew time, TRACECLK transition to TRACEDATA[17:0]
MIN
5.56
-1.61
-1.61
MAX
1.98
1.98
UNIT
ns
ns
ns
TRACECLK
TRACECTL
TRACEDATA[X:0]
TPIU4
TPIU1
TPIU2
TPIU3
TPIU5
TPIU5
TPIU4
Figure 5-129. TPIU—PLL DDR Transmit Mode(1)
(1) In d[X:0], X is equal to 15 or 17.
SPRS906_TIMING_TIMER_01
In Table 5-202 are presented the specific groupings of signals (IOSET) for use with TPIU signals.
SIGNALS
emu19
emu18
emu17
emu16
emu15
emu14
emu13
emu12
emu11
emu10
emu9
emu8
emu7
emu6
BALL
E10
B10
A10
F10
A11
A8
A9
A7
B9
C8
B8
E8
C7
B7
Table 5-202. TPIU IOSETs
IOSET1
MUX
5
5
5
5
5
5
5
5
5
5
5
5
5
5
BALL
IOSET2
MUX
322 Specifications
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