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| DRA790 Datasheet, PDF (283/436 Pages) Texas Instruments – Infotainment Applications Processor | |||
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DRA790, DRA791
DRA793, DRA797
SPRS968A â AUGUST 2016 â REVISED FEBRUARY 2017
Table 5-134. Switching Characteristics for MMC2 - JC64 High Speed SDR Mode
NO.
JC641
JC642H
PARAMETER
fop(clk)
tw(clkH)
DESCRIPTION
Operating frequency, mmc2_clk
Pulse duration, mmc2_clk high
JC642L tw(clkL)
Pulse duration, mmc2_clk low
JC645 td(clkL-cmdV)
Delay time, mmc2_clk falling clock edge to mmc2_cmd transition
JC646 td(clkL-dV)
Delay time, mmc2_clk falling clock edge to mmc2_dat[7:0] transition
(1) P = output mmc2_clk period in ns
MIN
0.5 Ã P-
0.172 (1)
0.5 Ã P-
0.172 (1)
-6.64
-6.64
MAX
48
6.64
6.64
UNIT
MHz
ns
ns
ns
ns
mmc2_clk
mmc2_cmd
mmc2_dat[7:0]
JC641
JC642L
JC643
JC647
JC642H
JC644
JC648
Figure 5-91. MMC/SD/SDIO in - High Speed JC64 - Receiver Mode
SPRS906_TIMING_MMC2_03
mmc2_clk
mmc2_cmd
mmc2_dat[7:0]
JC645
JC646
JC641
JC642L
JC642H
JC645
JC646
Figure 5-92. MMC/SD/SDIO in - High Speed JC64 - transmitter Mode
MMC2_04
5.9.6.21.2.3 High-speed HS200 JEDS84 SDR, 8-bit data, half cycle
Table 5-135 presents Switching characteristics for MMC2 - HS200 in transmitter mode (see Figure 5-93).
Copyright © 2016â2017, Texas Instruments Incorporated
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Product Folder Links: DRA790 DRA791 DRA793 DRA797
Specifications 283
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