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DRA790 Datasheet, PDF (150/436 Pages) Texas Instruments – Infotainment Applications Processor
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
www.ti.com
(6) This value includes a ground difference of 50 mV between the transmitter and the receiver, the static common-mode level tolerance and
variations below 450 MHz.
(7) This number corresponds to the VODMAX transmitter.
(8) Common mode is defined as the average voltage level of X and Y: VCMRX = (VX + VY) / 2.
(9) Common mode ripple may be due to tR or tF and transmission line impairments in the PCB.
(10) For more information regarding the pin name (or ball name) and corresponding signal name, see Table 4-5 CSI 2 Signal Descriptions.
Table 5-11. BMLB18 Buffers DC Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
NOM
Signal Names in MUXMODE 0: mlbp_dat_n / mlbp_dat_p / mlbp_sig_n / mlbp_sig_p / mlbp_clk_n / mlbp_clk_p;
Balls: T1 / T2 / U4 / T3 / U1 / U2;
1.8-V Mode
VIH/VIL
Input high-level threshold
VCM ±
50mV
VHYS
VOD
Input hysteresis voltage
Differential output voltage (measured with 50ohm resistor
between PAD and PADN)
NONE
300
VCM
Common mode output voltage
1
CPAD
Pad capacitance (including package capacitance)
MAX UNIT
V
mV
500 mV
1.5
V
4
pF
Table 5-12. Dual Voltage SDIO1833 DC Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
NOM
MAX
Signal Names in Mode 0: mmc1_clk, mmc1_cmd, mmc1_data[3:0]
Bottom Balls: U3 / V4 / V3 / V2 / W1 / V1
1.8-V Mode
VIH
Input high-level threshold
VIL
Input low-level threshold
VHYS
Input hysteresis voltage
IIN
Input current at each I/O pin
IOZ
IOZ(IPAD Current) for BIDI cell. This current is contributed by the
tristated driver leakage + input current of the Rx + weak
pullup/pulldown leakage. PAD is swept from 0 to VDDS and the
Max(I(PAD)) is measured and is reported as IOZ
IIN with
pulldown
Input current at each I/O pin with weak pulldown enabled
measured when PAD = VDDS
enabled
IIN with
pullup
Input current at each I/O pin with weak pullup enabled measured
when PAD = 0
enabled
CPAD
Pad capacitance (including package capacitance)
VOH
Output high-level threshold (IOH = 2 mA)
VOL
Output low-level threshold (IOL = 2 mA)
3.3-V Mode
1.27
50 (2)
50
60
1.4
0.58
30
30
120
210
120
200
5
0.45
VIH
Input high-level threshold
0.625 ×
VDDS
VIL
VHYS
IIN
IOZ
Input low-level threshold
Input hysteresis voltage
Input current at each I/O pin
IOZ(IPAD Current) for BIDI cell. This current is contributed by the
tristated driver leakage + input current of the Rx + weak
pullup/pulldown leakage. PAD is swept from 0 to VDDS and the
Max(I(PAD)) is measured and is reported as IOZ
40 (2)
0.25 × VDDS
110
110
UNIT
V
V
mV
µA
µA
µA
µA
pF
V
V
V
V
mV
µA
µA
150 Specifications
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