DRA790 Datasheet, PDF (305/436 Pages) Texas Instruments – Infotainment Applications Processor

www.ti.com
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
Table 5-178. PRU-ICSS MII_RT Switching Characteristics - MII_TXD[3:0] and MII_TXEN
NO.
1
PARAMETER
t_{d(TX_CLK-TXD)}
t_{d(TX_CLK-TX_EN)}
t_{d(TX_CLK-TXD)}
t_{d(TX_CLK-TX_EN)}
DESCRIPTION
Delay time, TX_CLK high to TXD[3:0] valid
Delay time, TX_CLK to TX_EN valid
Delay time, TX_CLK high to TXD[3:0] valid
Delay time, TX_CLK to TX_EN valid
SPEED
10 Mbps
100 Mbps
MIN MAX UNIT
5
25 ns
5
25 ns
1
MII_TXCLK (input)
MII_TXD[3:0],
MII_TXEN (outputs)
Figure 5-125. PRU-ICSS MII_TXD[3:0], MII_TXEN Timing
SPRS91x_TIMING_PRU_MII_RT_07
5.9.6.23.4 PRU-ICSS Universal Asynchronous Receiver Transmitter (PRU-ICSS UART)
Table 5-179. Timing Requirements for PRU-ICSS UART Receive
NO. PARAMETER
DESCRIPTION
3
t_w(RX)
Pulse duration, receive start, stop, data bit
(1) U = UART baud time = 1/programmed baud rate.
MIN
0.96U ⁽¹⁾
MAX UNIT
1.05U ns
Table 5-180. Switching Characteristics Over Recommended Operating Conditions for PRU-ICSS UART
Transmit
NO. PARAMETER
DESCRIPTION
1
ƒbaud(baud)
Maximum programmable baud rate
2
t_w(TX)
Pulse duration, transmit start, stop, data bit
(1) U = UART baud time = 1/programmed baud rate.
MIN
0
U - 2 ⁽¹⁾
MAX
12
U+2
UNIT
MHz
ns
2
1
UART_TXD
Start
Bit
Data Bits
3
4
UART_RXD
Start
Bit
Data Bits
SPRS960_TIMING_PRU_UART_01
Figure 5-126. PRU-ICSS UART Timing
5.9.6.23.5 PRU-ICSS IOSETs
In Table 5-181 are presented the specific groupings of signals (IOSET) for use with PRU-ICSS1.
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA790 DRA791 DRA793 DRA797
Specifications 305