DRA790 Datasheet, PDF (174/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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Table 5-29. VIN1 IOSETs (continued)
SIGNALS
IOSET2
IOSET4 ⁽¹⁾
IOSET5 ⁽¹⁾
IOSET6 ⁽¹⁾
IOSET7 ⁽¹⁾
IOSET8
IOSET9
IOSET10
BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX BALL MUX
vin1a_d20
K3
2
vin1a_d21
K2
2
vin1a_d22
J1
2
vin1a_d23
K1
2
vin1b
vin1b_clk1
L5
5
J2
6
vin1b_hsync1
P3
5
K4
6
vin1b_vsync1
R2
5
H1
6
vin1b_fld1
N4
5
G1
6
vin1b_de1
P4
5
L3
6
vin1b_d0
L6
5
M1
6
vin1b_d1
N5
5
M2
6
vin1b_d2
N6
5
L2
6
vin1b_d3
T4
5
L1
6
vin1b_d4
T5
5
K3
6
vin1b_d5
N2
5
K2
6
vin1b_d6
P2
5
J1
6
vin1b_d7
N1
5
K1
6
(1) The IOSET under this column is only applicable for pins with alternate functionality which allows either VIN1 or VIN2 signals to be mapped to the pins. These alternate functions are
controlled via CTRL_CORE_VIP_MUX_SELECT register. For more information on how to use these options, please refer to Device TRM, Chapter Control Module, Section Pad
Configuration Registers.
SIGNALS
IOSET1
BALL MUX
vin2a_clk0
vin2a_hsync
0
vin2a_vsync
0
vin2a_fld0
vin2a_de0
IOSET2
BALL MUX
IOSET4
BALL MUX
D8
0
E8
0
B8
0
C7
0
B7
0
Table 5-30. VIN2 IOSETs
IOSET5
BALL MUX
D8
0
E8
0
IOSET6
BALL MUX
vin2a
L5
4
P3
4
IOSET7 ⁽¹⁾
BALL MUX
B8
0
R2
4
B7
1
N4
4
P4
4
IOSET8 ⁽¹⁾
BALL MUX
IOSET9 ⁽¹⁾
BALL MUX
IOSET10
BALL MUX
IOSET11
BALL MUX
174 Specifications
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