DRA790 Datasheet, PDF (395/436 Pages) Texas Instruments – Infotainment Applications Processor

www.ti.com
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
7.5.3.2 USB 3.0 General routing rules
Some general routing guidelines regarding USB 3.0:
• Avoid crossing splits reference plane(s).
• Shorter trace length is preferred.
• Minimize the via usage and layer transition
• Keep large spacing between TX and RX pairs.
• Intra-lane delay mismatch between DP and DM less than 1ps. Same for RXp and RXn.
• Distance between common mode filter (CMF) and ESD protection device should be as short as
possible
• Distance between ESD protection device and USB connector should be as short as possible.
• Distance between AC capacitors (TX only) and CMF should be as short as possible.
• USB 3.0 signals should always be routed over an adjacent ground plane.
Table 7-10 and Table 7-11 present routing specification and recommendations for USB1 in the device.
Table 7-10. USB1 Routing Specifications
PARAMETER
MIN
TYP
MAX
UNIT
Device balls to USB 3.0 connector trace
length
3500
Mils
Skew within a differential pair
3
6
Mils
Number of stubs allowed on TX/RX traces
0
Stubs
TX/RX pair differential impedance
83
90
97
Ω
Number of vias on each TX/RX trace
2
Vias
Differential pair to any other trace spacing
2xDS
3xDS
Number of ground plane cuts allowed within
USB3 routing region (except for specific
ground carving as explained in this
document)
0
Cuts
Number of layers between USB3.0 routing
region and reference ground plane
0
Layers
PCB trace width
6
Mils
PCB BGA escape via pad size
18
Mils
PCB BGA escape via hole size
10
Mils
1. Vias must be used in pairs and spaced equally along a signal path.
2. DS = differential spacing of the traces.
3. Exceptions may be necessary in the SoC package BGA area.
4. GND guard-bands on the same layer may be closer, but should not be allowed to affect the impedance
of the differential pair routing. GND guard-bands to isolate USB3.0 differential pairs from all other
signals are recommended.
Item
ESD location
ESD part number
CMF part number
Connector
Carve Ground
Table 7-11. USB1 Routing Recommendations
Description
Reason
Place ESD component on same layer as connector (no via or stub to Eliminate reflection loss from via
ESD component)
& stub to ESD
TPD1E05U06
Minimize capacitance (0.42pF)
DLW21SN900HQ2
Manufacturer’s recommended
device
Use USB3.0 connector with supporting s-parameter model
Enable full signal chain
simulation
Carve GND underneath AC Caps, ESD, CMF, and connector
Minimize capacitance under ESD
and CMF
Copyright © 2016–2017, Texas Instruments Incorporated
Applications, Implementation, and Layout 395
Submit Documentation Feedback
Product Folder Links: DRA790 DRA791 DRA793 DRA797