XRT72L56 Datasheet, PDF (95/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
XRT72L56
REV. P1.1.2
2.4.2.10 Receive DS3 Interrupt Enable Register
RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP Bit Error
Interrupt
Enable
LOS
Interrupt
Enable
AIS
Interrupt
Enable
Idle Interrupt
Enable
FERF
Interrupt
Enable
AIC
Interrupt
Enable
OOF
Interrupt
Enable
P-Bit Error
Interrupt
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bit 7 - CP Bit Error Interrupt Enable
This Read/Write bit-field is used to enable or disable
the Detection of CP-Bit Error Interrupt. Setting this
bit-field to “1’ enables this interrupt. Setting this bit-
field to “0” disables this interrupt.
NOTES:
1. For more information on the CP-Bit Error Checking/
Detection, please see Section 3.3.2.6.2.
2. This bit-field is only valid if the Channel has been
configured to operate in the DS3, C-Bit Parity
Framing format.
Bit 6 - LOS Interrupt Enable
This Read/Write bit-field is used to enable or disable
the Change in LOS condition interrupt. Setting this
bit-field to "1" enables this interrupt. Setting this bit-
field to "0" disables this interrupt.
NOTE: For more information on the LOS Condition, please
see Sections 3.3.2.5.1.
Bit 5 - AIS Interrupt Enable
This Read/Write bit-field is used to enable or disable
the Change in AIS condition interrupt. Setting this bit-
field to "1" enables this interrupt. Setting this bit-field
to "0" disables this interrupt.
NOTE: For more information on the AIS Condition, please
see Sections 3.3.2.5.2.
Bit 4 - Idle Interrupt Enable
This Read/Write bit-field is used to enable or disable
the Change in Idle condition interrupt. Setting this bit-
field to "1" enables this interrupt. Setting this bit-field
to "0" disables this interrupt.
NOTE: For more information on the Idle Condition, please
see Section 3.3.2.5.3.
Bit 3 - FERF Interrupt Enable
This Read/Write bit-field is used to enable or disable
the Change in FERF (Far End Receive Failure) Sta-
tus interrupt. Setting this bit-field to "1" enables this
interrupt. Setting this bit-field to "0" disables this in-
terrupt.
NOTE: For more information on Far-End Receive Failures
(or Yellow Alarms) please see Section 3.3.2.5.4.
Bit 2 - AIC Interrupt Enable
This Read/Write bit field allows the user to enable or
disable the Change in AIC value interrupt. Setting
this bit-field to "1" enables this interrupt. Setting this
bit-field to "0" disables this interrupt.
NOTE: For more information on this interrupt condition,
please see Section 3.3.2.5.6.
Bit 1 - OOF Interrupt Enable
This Read/Write bit field is used to enable or disable
the Change in Out-of-Frame (OOF) status interrupt.
Setting this bit-field to "1" enables this interrupt. Set-
ting this bit-field to "0" disables this interrupt.
NOTE: For more information on the OOF' Condition, please
see Section 3.3.2.2.
Bit 0 - P-Bit Error Interrupt Enable
This Read/Write bit-field is used to enable or disable
the Detection of P-Bit Error interrupt. Setting this bit-
field to "1" enables this interrupt. Setting this bit-field
to "0" disables this interrupt.
NOTE: For more information on the P-Bit Error Checking/
Detection, please see Section 3.3.2.6.1.
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