XRT72L56 Datasheet, PDF(166/486 Page) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L56 Datasheet, PDF (166/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

REV. P1.1.2

FIGURE 40. DS3 FRAME FORMAT FOR C-BIT PARITY

Ã¡Ã§

PRELIMINARY

P

I

F1

I

CP

I

F0

I

CP

I

F0

I

CP

I

F1

I

P

I

F1

I FEBE I

F0

I FEBE I

F0

I FEBE I

F1

I

M0

I

F1

I

DL

I

F0

I

DL

I

F0

I

DL

I

F1

I

M1

I

F1

I UDL I

F0

I UDL I

F0

I UDL I

F1

I

M0

I

F1

I UDL I

F0

I UDL I

F0

I UDL I

F1

I

X = Signaling bit for network control

I = Payload Information (84 bit packets)

Fi = Frame synchronization bit with logic value i

P = Parity bit

Mi = Multiframe synchronization bit with logic value i

AIC = Application Identification Channel

NA = reserved for network application

FEAC = Far End Alarm and Control

DL = Data Link

CP = CP (Path)-bit parity

FEBE = Far End Block Error

UDL = User Data Link

FIGURE 41. DS3 FRAME FORMAT FOR M13

X

I

F1

I C11 I

F0

I C12 I

F0

I C13 I

F1

I

I

X

I

F1

I C21 I

F0

I C22 I

F0

I C23 I

F1

I

P

I

F1

I C31 I

F0

I C32 I

F0

I C33 I

F1

I

P

I

F1

I C41 I

F0

I C42 I

F0

I C43 I

F1

I

M0

I

F1

I C51 I

F0

I C52 I

F0

I C53 I

F1

I

M1

I

F1

I C61 I

F0

I C62 I

F0

I C63 I

F1

I

M0

I

F1

I C71 I

F0

I C72 I

F0

I C73 I

F1

I

X = Signaling bit for network control

Mi = multiframe synchronization bit with logic values i

I = Payload Information (84 bit packets)

Fi = Frame synchronization bit with logic value i

Cij = jth stuff code bit of ith channel

P = Parity bit

The user can choose between these two frame for-

mats, by writing the appropriate data to bit 2 of the

Framer Operating Mode Register (Address = 0x00),

as depicted below.

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)

BIT 7

BIT 6

BIT 5

Local Loopback

R/W

DS3/E3*

R/W

Internal LOS

Enable

R/W

BIT 4

RESET

R/W

BIT 3

Interrupt

Enable Reset

R/W

BIT2

Frame Format

R/W

BIT 1

BIT 0

TimRefSel[1:0]

R/W

R/W

147

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