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XRT72L56 Datasheet, PDF (383/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
If the XRT72L56 has been configured to operate in
this mode, then the XRT72L56 will behave as follows.
A. Looped Timing (Uses the RxLineClk as the
Timing Reference)
In this mode, the Transmit Section of the XRT72L56
will use the RxLineClk signal as its timing reference.
When the XRT72L56 is operating in the Nibble-Mode,
it will internally divide the RxLineClk signal, by a fac-
tor of four (4) and will output this signal via the TxNib-
Clk output pin.
B. Nibble-Parallel Mode
The XRT72L56 will accept the E3 payload data, from
the Terminal Equipment in a nibble-parallel manner,
via the TxNib[3:0] input pins. The Transmit Terminal
Equipment Input Interface block will latch this data in-
to its circuitry, on the rising edge of the TxNibClk out-
put signal.
C. Delineation of the Outbound E3 frames
The XRT72L56 will pulse the TxNibFrame output pin
"High" for one bit-period, coincident with the
XRT72L56 processing the last nibble of a given E3
frame.
D. Sampling of payload data, from the Terminal
Equipment
In Mode 4, the XRT72L56 will sample the data, at the
TxNib[3:0] input pins, on the third rising edge of the
RxOutClk clock signal, following a pulse in the TxNib-
Clk signal (see Figure 164).
NOTE: The TxNibClk signal, from the XRT72L56, operates
nominally at 11.184 MHz (e.g., 44.736 MHz divided by 4).
However, for reasons described below, TxNibClk effectively
operates at a lower clock frequency. The Transmit Payload
Data Input Interface is only used to accept the payload
data, which is intended to be carried by Outbound DS3
frames. The Transmit Payload Data Input Interface is not
designed to accommodate the entire DS3 data stream.
The E3 Frame consists of 537 bytes or 1074 nibbles.
Therefore, the XRT72L56 will supply 1074 TxNibClk
pulses between the rising edges of two consecutive
TxNibFrame pulses. The E3 Frame repetition rate is
8.0kHz. Hence, 1074 TxNibClk pulses for each E3
frame period amounts to TxNibClk running at approx-
imately 8.592 MHz. The method by which the 1074
TxNibClk pulses are distributed throughout the E3
frame period is presented below.
Nominally, the Transmit Section within the XRT72L56
will generate a TxNibClk pulse for every 4 RxOutClk
(or TxInClk) periods.
Interfacing the Transmit Payload Data Input Inter-
face block of the XRT72L56 to the Terminal Equip-
ment for Mode 4 Operation
Figure 163 presents an illustration of the Transmit
Payload Data Input Interface block (within the
XRT72L56) being interfaced to the Terminal Equip-
ment, for Mode 4 Operation.
FIGURE 163. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT72L56 FOR MODE 4 (NIBBLE-PARALLEL/LOOP-TIMED) OPERATION
VCC
E3_Nib_Clock_In
E3_Data_Out[3:0]
Tx_Start_of_Frame
E3_Overhead_Ind
8.592 MHz
4
TxNibClk
TxNib[3:0]
TxNibFrame
TxOH_Ind
NibInt
RxLineClk
34.368MHz
Terminal Equipment
XRT72L5X E3 Framer
Mode 4 Operation of the Terminal Equipment
When the XRT72L56 is operating in this mode, it will
function as the source of the 8.592MHz (e.g., the
34.368MHz clock signal divided by 4) clock signal
that will be used as the Terminal Equipment Interface
clock by both the XRT72L56 and the Terminal Equip-
ment.
The Terminal Equipment will output the payload data
of the Outbound E3 data stream via its
E3_Data_Out[3:0] pins on the rising edge of the
364