XRT72L56 Datasheet, PDF (281/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
If the XRT72L56 has been configured to operate in
this mode, then the XRT72L56 will function as fol-
lows.
A. Local-Timed - Uses the TxInClk signal as the
Timing Reference
In this mode, the Transmit Section of the XRT72L56
will use the TxInClk signal as its timing reference.
B. Serial Mode
The XRT72L56 will receive the E3 payload data, in a
serial manner, via the TxSer input pin. The Transmit
Payload Data Input Interface (within the XRT72L56)
will latch this data into its circuitry, on the rising edge
of the TxInClk input clock signal.
C. Delineation of outbound DS3 frames (Frame
Master Mode)
The Transmit Section of the XRT72L56 will use the
TxInClk signal as its timing reference, and will initiate
E3 frame generation, asynchronously with respect to
any externally applied signal. The XRT72L56 will
pulse its TxFrame output pin "High" whenever its it
processing the very last bit-field within a given E3
frame.
D. Sampling of payload data, from the Terminal
Equipment
In Mode 3, the XRT72L56 will sample the data, at the
TxSer input pin, on the rising edge of TxInClk.
Interfacing the Transmit Payload Data Input Inter-
face block of the XRT72L56 to the Terminal Equip-
ment for Mode 3 Operation
Figure 104 presents an illustration of the Transmit
Payload Data Input Interface block (within the
XRT72L56) being interfaced to the Terminal Equip-
ment, for Mode 3 operation.
FIGURE 104. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT72L56 FOR MODE 3 (SERIAL/LOCAL-TIME/FRAME-MASTER) OPERATION
34.368 MHz Clock
Source
E3_Clock_In
E3_Data_Out
Tx_Start_of_Frame
E3_Overhead_Ind
Terminal Equipment
TxInClk
TxSer
TxFrame
TxOH_Ind
NibInt
XRT72L5x E3 Framer
Mode 3 Operation of the Terminal Equipment
In Figure 104, both the Terminal Equipment and the
XRT72L56 are driven by an external 34.368 MHz
clock signal. This clock signal is connected to the
E3_Clock_In input of the Terminal Equipment and the
TxInClk input pin of the XRT72L56.
The Terminal Equipment will serially output the pay-
load data on its E3_Data_Out output pin, upon the
rising edge of the signal at the E3_Clock_In input pin.
Similarly, the XRT72L56 will latch the data, residing
on the TxSer input pin, on the rising edge of TxInClk.
The XRT72L56 will pulse the TxFrame output pin
"High" for one bit-period, coincident while it is pro-
cessing the last bit-field within a given outbound E3
frame. The Terminal Equipment is expected to moni-
tor the TxFrame signal (from the XRT72L56) and to
place the first bit, within the very next outbound E3
frame on the TxSer input pin.
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