XRT72L56 Datasheet, PDF (248/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
TABLE 44: LISTING AND DESCRIPTION OF THE PIN ASSOCIATED WITH THE RECEIVE OVERHEAD DATA OUTPUT
INTERFACE BLOCK (METHOD 2)
SIGNAL NAME
RxOH
RxOHEnable
RxOHFrame
RxOutClk
TYPE
Output
Output
Output
Output
DESCRIPTION
Receive Overhead Data Output pin:
The XRT72L56 will output the overhead bits, within the incoming DS3 frames, via this pin.
The Receive Overhead Output Interface will pulse the RxOHEnable output pin (for one RxOut-
Clk period) at approximately the middle of the RxOH bit period. The user is advised to design
the Terminal Equipment to latch the contents of the RxOH output pin, whenever the RxOHEn-
able output pin is sampled "High" on the falling edge of RxOutClk.
Receive Overhead Data Output Enable - Output pin:
The XRT72L56 will assert this output signal for one RxOutClk period when it is safe for the Ter-
minal Equipment to sample the data on the RxOH output pin.
Receive Overhead Data Output Interface - Start of Frame Indicator:
The XRT72L56 will drive this output pin "High" (for one period of the RxOH signal), whenever
the first overhead bit, within a given DS3 frame is being driven onto the RxOH output pin.
Receive Section Output Clock Signal:
This clock signal is derived from the RxLineClk signal (from the LIU) for loop-timing applica-
tions, and the TxInClk signal (from a local oscillator) for local-timing applications. For DS3
applications, this clock signal will operate at 44.736MHz.
The user is advised to design the Terminal Equipment to latch the contents of the RxOH pin,
anytime the RxOHEnable output signal is sampled "High" on the falling edge of this clock sig-
nal.
Interfacing the Receive Overhead Data Output In-
terface block to the Terminal Equipment (Method
2)
Figure 90 illustrates how one should interface the Re-
ceive Overhead Data Output Interface block to the
Terminal Equipment, when using Method 2 to sample
and process the overhead bits from the inbound DS3
data stream.
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