XRT72L56 Datasheet, PDF (26/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
PIN DESCRIPTION FOR THE XRT72L56
PIN #
A25
A26
B1
B2
B3
B4
B5
B6
B7
B8
PIN NAME
RxNib1[2]/
RxHDLCDat1[2]
RxFrame[2]
NC
LLOOP[5]
RLOL[5]
Encodis[5]
TxLev[5]
RLOL[0]
REQ[0]
RxOOF[0]
TYPE
O
O
O
I
O
O
I
O
O
DESCRIPTION
Receive Nibble Output -Channel 2, Bit 1:
See Description for pin A10
Receive HDLC Data Output - Channel 2, bit 1:
This pin contains bit 1 RxHDLC data when the HDLC controller is turned on.
See Description for Pin A9
Not connected
Local Loopback Output Pin:
This output pin connected to the LLB input pins of the EXAR’s DS3/E3
LIU(XRT73xx) configures the LIU into the “local Loop-back” mode.
Writing a “1” to bit 1 of the “Line Interface Drive Register” (Address = 0x80)
will cause this output pin to toggle “high”.
Receive Loss of Lock Indicator:
Connect the RLOL output from the EXAR’s DS3/E3 LIU to this pin to indi-
cate the receive PLL loss of lock.
When this pin is “low”, the clock recovery PLL of the EXAR’s DS3/E3
LIU(XRT73xx) is properly locked into the incoming DS3/E3 data stream. If
this pin is “high” the PLL has lost the lock and not recovering clcok and data.
The state of this pin is monitored by reading the Bit 1 (RLOL) within the
Line Interface Scan Register (Address = 0x81).
Encoder (HDB3) Disable Output pin:
This output pin is connected to the input pin of the EXAR’s DS3/E3 LIU
(XRT73xx) to disable or enable the B3Zs/HDB3 encoder/decoder within the
LIU.
The output condition of this pin can be controlled by writing either a “1” or
“0” to the bit 3 of the Line Interface Drive register (Address = 0x80).
Transmit Line Build-Out Enable/Disable Select Output:
Connect this output to the TxLEV input of the EXAR’s DS3/E3 LIU
(XRT73xx) to control the output signal amplitudes.
For DS3 Applications:
Setting this pin “high” disables the Line Build-out circuit within the LIU. In
this mode, the LIU will output unshaped ( eg: square wave) pulses onto the
line via TTIP and TRing.
Setting this pin low enables the Line Build-out circuit within the LIU.
For E3 Applications:
This pin can be used as a General Purpose Output pin. The Transmit Line
Build-Out circuitry is not active for E3 applications.
See Description for Pin B3
See Description for Pin A1
Receiver "Out of Frame" Indicator:
When “high” , indicates a receive framer is out of frame synchronization
condition.
No output when the framer correctly locates the framing alignment bits or
bytes and correctly aligns itself with the incoming DS3 or E3 frames.
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