XRT72L56 Datasheet, PDF (352/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
TABLE 67: THE RELATIONSHIP BETWEEN THE NUMBER OF RXOHENABLE OUTPUT PULSES (SINCE RXOHFRAME WAS
LAST SAMPLED "HIGH") TO THE E3 OVERHEAD BIT, THAT IS BEING OUTPUT VIA THE RXOH OUTPUT PIN
NUMBER OF RXOHENABLE OUTPUT PULSES
0 (Clock edge is coincident with RxOHFrame being detected "High”)
1
2
3
4
5
6
7
8
9
10
11
THE OVERHEAD BIT BEING OUTPUT BY THE
XRT72L56
FAS Pattern - Bit 9
FAS Pattern - Bit 8
FAS Pattern - Bit 7
FAS Pattern - Bit 6
FAS Pattern - Bit 5
FAS Pattern - Bit 4
FAS Pattern - Bit 3
FAS Pattern - Bit 2
FAS Pattern - Bit 1
FAS Pattern - Bit 0
A Bit
N Bit
Figure 148 presents the typical behavior of the Re-
ceive Overhead Data Output Interface block, when
Method 2 is being used to sample the incoming E3
overhead bits.
FIGURE 148. ILLUSTRATION OF THE SIGNALS THAT ARE OUTPUT VIA THE RECEIVE OVERHEAD DATA OUTPUT INTER-
FACE BLOCK (FOR METHOD 2).
RxOutClk
RxOHEnable
RxOHFrame
Recommended
Sampling
Edges
RxOH
BIP - 4, Bit 0
FAS, Bit 9
FAS, Bit 8
FAS, Bit 7
FAS, Bit 6
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