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XRT72L56 Datasheet, PDF (178/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
áç
PRELIMINARY
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7
BIT 6
BIT 5
BIT 4
0
0
1
0
3. Interface the XRT72L56, to the Terminal Equip-
ment, as illustrated in Figure 46.
4.2.1.3 Mode 3 - The Serial/Local-Timed/
Frame-Master Mode Behavior of the XRT72L56
If the XRT72L56 has been configured to operate in
this mode, then the XRT72L56 will function as fol-
lows.
A. Local Timing - (Uses the TxInClk signal as the
Timing Reference)
In this mode, the Transmit Section of the XRT72L56
will use the TxInClk signal as its timing reference.
B. Serial Mode
The XRT72L56 will receive the DS3 payload data, in
a serial manner, via the TxSer input pin. The Trans-
mit Payload Data Input Interface (within the
XRT72L56) will latch this data into its circuitry, on the
rising edge of the TxInClk input clock signal.
C. Delineation of outbound DS3 frames (Frame
Master Mode)
BIT 3
BIT2
BIT 1
BIT 0
1
0
0
1
The Transmit Section of the XRT72L56 will use the
TxInClk signal as its timing reference, and will initiate
DS3 frame generation, asynchronously with respect
to any externally applied signal. The XRT72L56 will
pulse its TxFrame output pin "High" whenever its it
processing the very last bit-field within a given DS3
frame.
D. Sampling of payload data, from the Terminal
Equipment
In Mode 3, the XRT72L56 will sample the data, at the
TxSer input pin, on the rising edge of TxInClk.
Interfacing the Transmit Payload Data Input Inter-
face block of the XRT72L56 to the Terminal Equip-
ment for Mode 3 Operation
Figure 48 presents an illustration of the Transmit Pay-
load Data Input Interface block (within the XRT72L56)
being interfaced to the Terminal Equipment, for Mode
3 operation.
FIGURE 48. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT72L56 FOR MODE 3 (SERIAL/LOCAL-TIMED/FRAME-MASTER) OPERATION
44.736 MHz Clock
Source
DS3_Clock_In
DS3_Data_Out
Tx_Start_of_Frame
DS3_Overhead_Ind
TxInClk
TxSer
TxFrame
TxOH_Ind
NibInt
Terminal Equipment
XRT72L5x DS3 Framer
Mode 3 Operation of the Terminal Equipment
In Figure 48, both the Terminal Equipment and the
XRT72L56 are driven by an external 44.736MHz
clock signal. This clock signal is connected to the
DS3_Clock_In input of the Terminal Equipment and
the TxInClk input pin of the XRT72L56.
The Terminal Equipment will serially output the pay-
load data on its DS3_Data_Out output pin, upon the
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