XRT72L56 Datasheet, PDF (483/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
FIGURE 215. A SIMPLE ILLUSTRATION OF AN OUTBOUND HDLC FRAME, AS ASSEMBLED BY THE TRANSMIT HDLC
CONTROLLER, WHEN CRC-16 IS SELECTED.
CRC-16
Trailer
User Supplied Data
HDLC Frame
Once the outbound HDLC frame has been formed,
then it will be transmitted to the remote terminal
equipment via payload bits of the outbound DS3 or
E3 frames.
If the user’s terminal equipment does not supply any
more data (which needs to be encapsulated into the
outbound HDLC frame and transmitted to the remote
terminal equipment), then the Transmit HDLC Con-
troller block will begin transmitting a constant stream
of flag sequence octets (0x7E). These flag sequence
octets will also be transmitted to the remote terminal
equipment via the payload bits of the outbound DS3
or E3 frames.
8.2.2 Operating the Receive HDLC Controller
Block
The Receive HDLC Controller block, within each
channel consists of the following pins.
• RxIdle_n
• Val_FCS_n
• RxHDLCClk_n
• RxHDLCDat_n[7:0]
Each of these output pins are described below in
Table 95 .
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