XRT72L56 Datasheet, PDF (421/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

áç
PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
mission of a LAPD Message Interrupt to the
Microcontroller/Microprocessor. Once the
XRT72L56 Framer IC generates this interrupt, it
will do the following.
• Assert the Interrupt Output pin (INT) by toggling it
“Low”.
• Set Bit 0 (TxLAPD Interrupt Status) within the TxE3
LAPD Status and Interrupt Register, to “1” as illus-
trated below.
TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34)
BIT 7
RO
0
BIT 6
BIT 5
Not Used
RO
RO
0
0
BIT 4
RO
0
BIT 3
TXDL Start
BIT 2
TXDL Busy
R/W
RO
0
0
BIT 1
TxLAPD
Interrupt
Enable
R/W
0
BIT 0
TxLAPD
Interrupt
Status
RUR
1
The purpose of this interrupt is to alert the Microcon-
troller/MIcroprocessor that the LAPD Transmitter has
completed its transmission of a given LAPD (or PM-
DL) Message, and is now ready to transmit the next
PMDL Message, to the Remote Terminal Equipment.
6.3 THE RECEIVE SECTION OF THE XRT72L56 (E3
MODE OPERATION)
When the XRT72L56 has been configured to operate
in the E3 Mode, the Receive Section of the
XRT72L56 consists of the following functional blocks.
• Receive LIU Interface block
• Receive HDLC Controller block
• Receive E3 Framer block
• Receive Overhead Data Output Interface block
• Receive Payload Data Output Interface block
Figure 185 presents a simple illustration of the Re-
ceive Section of the XRT72L56 Framer IC.
FIGURE 185. A SIMPLE ILLUSTRATION OF THE RECEIVE SECTION OF THE XRT72L56, WHEN IT HAS BEEN CONFIG-
URED TO OPERATE IN THE E3 MODE
RxOHFrame
RxOHEnable
RxOH
RxOHClk
RxOHInd
RxSer
RxNib[3:0]
RxClk
RxFrame
Receive Overhead
Input
Interface Block
Receive
Payload Data
Input
Interface Block
Receive DS3/E3
Framer Block
Receive LIU
Interface
Block
RxPOS
RxNEG
RxLineClk
From Microprocessor
Interface Block
RRxxEE33HHDDLLCC
CConontrtorlollelre/rB/Buufffefrer
Each of these functional blocks will be discussed in
detail in this document.
6.3.1 The Receive E3 LIU Interface Block
The purpose of the Receive E3 LIU Interface block is
two-fold:
1. To receive encoded digital data from the E3 LIU
IC.
402