XRT72L56 Datasheet, PDF (172/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
TABLE 19: LISTING AND DESCRIPTION OF THE PINS ASSOCIATED WITH THE TRANSMIT PAYLOAD DATA INPUT
INTERFACE
SIGNAL NAME
TxSer
TxNib[3:0]
TxNibFrame
TxInClk
TxNibClk
TxOHInd
TxFrame
TYPE
DESCRIPTION
Input
Transmit Serial Payload Data Input Pin:
If the user opts to operate the XRT72L56 in the serial mode, then the Terminal Equipment is
expected to apply the payload data (that is to be transported via the outbound DS3 data
stream) to this input pin. The XRT72L56 will sample the data that is at this input pin upon the
rising edge either the RxOutClk or the TxInClk signal (whichever is appropriate).
NOTE: This signal is only active if the NibInt input pin is pulled "Low".
Input
Transmit Nibble-Parallel Payload Data Input pins:
If the user opts to operate the XRT72L56 in the Nibble-Parallel mode, then the Terminal Equip-
ment is expected to apply the payload data (that is to be transported via the outbound DS3
data stream) to these input pins. The XRT72L56 will sample the data that is at these input
pins upon the rising edge of the TxNibClk signal.
NOTE: These pins are only active if the NibInt input pin is pulled "High".
Output _{Transmit End of Frame Output Indicator - Nibble Mode}
The Transmit Section of the XRT72L56 will pulse this output pin "High" (for one nibble-period),
when the Transmit Payload Data Input Interface is processing the last nibble of a given DS3
frame.
The purpose of this output pin is to alert the Terminal Equipment that it needs to begin trans-
mission of a new DS3 frame to the XRT72L56.
Input
Transmit Section Timing Reference Clock Input pin:
The Transmit Section of the XRT72L56 can be configured to use this clock signal as the Tim-
ing Reference. If the user has made this configuration selection, then the XRT72L56 will use
this clock signal to sample the data on the TxSer input pin.
NOTE: If this configuration has been selected, then a 44.736 MHz clock signal must be applied
to this input pin.
Output _{Transmit Nibble Mode Output}
If the user opts to operate the XRT72L56 in the Nibble-Parallel mode, then the XRT72L56 will
derive this clock signal from the selected Timing Reference for the Transmit Section of the chip
(e.g., either the TxInClk or the RxLineClk signals).
The user is advised to configure the Terminal Equipment to output the outbound payload data
(to the XRT72L56 Framer IC) onto the TxNib[3:0] input pins, upon the rising edge of this clock
signal.
NOTE: For DS3 Applications, the XRT72L56 Framer IC will output 1176 clock edges (to the
Terminal Equipment) for each outbound DS3 frame.
Output _{Transmit Overhead Bit Indicator Output:}
This output pin will pulse "High" one-bit period prior to the time that the Transmit Section of the
XRT72L56 will be processing an Overhead bit. The purpose of this output pin is to warn the
Terminal Equipment that, during the very next bit-period, the XRT72L56 is going to be pro-
cessing an Overhead bit and will be ignoring any data that is applied to the TxSer input pin.
For DS3 applications, this output pin is only active if the XRT72L56 is operating in the Serial
Mode. This output pin will be pulled "Low" if the device is operating in the Nibble-Parallel
Mode.
Output _{Transmit End of Frame Output Indicator:}
The Transmit Section of the XRT72L56 will pulse this output pin "High" (for one bit-period),
when the Transmit Payload Data Input Interface is processing the last bit of a given DS3 frame.
The purpose of this output pin is to alert the Terminal Equipment that it needs to begin trans-
mission of a new DS3 frame to the XRT72L56 (e.g., to permit the XRT72L56 to maintain
Transmit DS3 framing alignment control over the Terminal Equipment).
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