XRT72L56 Datasheet, PDF (21/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) ........................................................ 453
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 453
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 454
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 454
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 454
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 455
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 455
RXE3 CONFIGURATION & STATUS REGISTER 1 (ADDRESS = 0X10) ........................................................ 456
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 456
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 456
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ........................................................................... 457
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ........................................................................... 457
7.0 diagnostic operation of the xrt72L56 framer ic .............................................................................. 458
Figure 213. Illustration of the Framer Local Loop-back path, within the XRT72L56 DS3/E3 Framer IC 458
8.0 High Speed HDLC Controller Mode of Operation ........................................................................... 460
8.1 CONFIGURING THE CHANNEL TO OPERATE IN THE HIGH SPEED HDLC CONTROLLER MODE ................................. 460
TABLE 93: ADDRESS LOCATIONS OF EACH OF THE HDLC CONTROL REGISTERS WITHIN THE XRT72L56 DE-
VICE. .................................................................................................................................................... 460
HDLC CONTROL REGISTER (ADDRESS = 0X82) ..................................................................................... 460
8.2 OPERATING THE HIGH SPEED HDLC CONTROLLER ............................................................................................ 460
8.2.1 Operating the Transmit HDLC Controller Block .................................................................................... 461
TABLE 94: DESCRIPTION OF EACH OF THE TRANSMIT HDLC CONTROLLER PINS .................................... 462
Figure 214. A Simple Illustration of an Outbound HDLC Frame, as assembled by the Transmit HDLC Con-
troller, when CRC-32 is selected. ........................................................................................................ 463
Figure 215. A Simple Illustration of an Outbound HDLC Frame, as assembled by the Transmit HDLC Con-
troller, when CRC-16 is selected. ........................................................................................................ 464
8.2.2 Operating the Receive HDLC Controller Block ..................................................................................... 464
TABLE 95: DESCRIPTION OF EACH OF THE RECEIVE HDLC CONTROLLER PINS ...................................... 465
ORDERING INFORMATION ........................................................................................ 466
PACKAGE DIMENSIONS ............................................................................................ 466
REVISION HISTORY ................................................................................................................................ 467
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