XRT72L56 Datasheet, PDF (263/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
XRT72L56
REV. P1.1.2
RXDS3 CONFIGURATION & STATUS REGISTER (ADDRESS = 0X10)
BIT 7
RxAIS
RO
0
BIT 6
RxLOS
RO
0
BIT 5
RxIdle
RO
0
BIT 4
RxOOF
RO
0
BIT 3
Reserved
RO
0
BIT 2
Framing On
Parity
RO
0
BIT 1
FSync
Algo
RO
0
BIT 0
MSync
Algo
RUR
0
If the AIS Condition is TRUE
1. The Local Terminal Equipment should transmit a
FERF (Far-End Receive Failure) to the Remote
Terminal Equipment. The XRT72L56 Framer IC
automatically supports this action via the FERF-
upon-AIS feature.
2. It should transmit the appropriate FEAC Message
(per Bellcore GR-499-CORE), to the Remote Ter-
minal, indicating that a Service Affecting condi-
tion has been detected in the Local Terminal
Equipment.
If the AIS Condition is FALSE
1. The Local Terminal Equipment should cease
transmitting a FERF (Far-End Receive Failure)
indicator to the Remote Terminal Equipment.
The XRT72L56 Framer IC automatically supports
this action via the FERF-upon-AIS feature.
2. It should transmit the appropriate FEAC Message
(per Bellcore GR-499-CORE) to the Remote Ter-
minal, indicates that the Service Affecting condi-
tion no longer exists.
4.3.6.2.4 The Change of State of Receive Idle
Interrupt
If the Change of State on Receive Idle Interrupt is en-
abled, then the XRT72L56 Framer IC will generate an
interrupt in response to either of the following condi-
tions.
1. When the XRT72L56 Framer IC detects an Idle
pattern, in the incoming DS3 data stream, and
2. When the XRT72L56 Framer IC no longer detects
the Idle pattern in the incoming DS3 data stream.
Conditions causing the XRT72L56 Framer IC to
declare an Idle condition
• If the Receive DS3 Framer block (within the
XRT72L56 Framer IC) detects at least 63 DS3
frames, which contains the Idle pattern.
Conditions causing the XRT72L56 Framer IC to
clear the Idle condition.
• Whenever, the Receive DS3 Framer block detects
63 DS3 frames, which do not contain the Idle pat-
tern.
Enabling and Disabling the Change of State on
Receive Idle Interrupt:
The user can enable or disable the Change of State
on Receive Idle Interrupt, by writing the appropriate
value into Bit 4 (Idle Interrupt Enable) within the
RxDS3 Interrupt Enable Register, as illustrated below.
RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12)
BIT 7
CP Bit Error
Interrupt
Enable
R/W
0
BIT 6
LOS
Interrupt
Enable
R/W
0
BIT 5
AIS
Interrupt
Enable
R/W
0
BIT 4
Idle Interrupt
Enable
R/W
0
BIT 3
FERF
Interrupt
Enable
R/W
0
BIT 2
AIC
Interrupt
Enable
R/W
0
BIT 1
OOF
Interrupt
Enable
R/W
0
BIT 0
P-Bit Error
Interrupt
Enable
R/W
0
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Servicing the Change of State on Receive Idle In-
terrupt
Whenever the XRT72L56 Framer IC detects this in-
terrupt, it will do all of the following.
• It will assert the Interrupt Request Output pin (INT)
by driving it "Low".
• It will set Bit 4 (Idle Interrupt Status), within the Rx
DS3 Interrupt Status Register to “1”, as indicated
below.
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