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XRT72L56 Datasheet, PDF (375/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
TABLE 71: LISTING AND DESCRIPTION OF THE PINS ASSOCIATED WITH THE TRANSMIT PAYLOAD DATA INPUT
INTERFACE
SIGNAL NAME
TxSer
TxNib[3:0]
TxInClk
TxNibClk
TxOHInd
TxFrame
TxFrameRef
RxOutClk
TYPE
DESCRIPTION
Input
Transmit Serial Payload Data Input Pin:
If the user opts to operate the XRT72L56 in the serial mode, then the Terminal Equipment is
expected to apply the payload data (that is to be transported via the Outbound E3 data stream)
to this input pin. The XRT72L56 will sample the data that is at this input pin upon the rising
edge either the RxOutClk or the TxInClk signal (whichever is appropriate).
NOTE: This signal is only active if the NibInt input pin is pulled "Low".
Input
Transmit Nibble-Parallel Payload Data Input pins:
If the user opts to operate the XRT72L56 in the Nibble-Parallel mode, then the Terminal Equip-
ment is expected to apply the payload data (that is to be transported via the Outbound E3 data
stream) to these input pins. The XRT72L56 will sample the data that is at these input pins upon
the rising edge of the TxNibClk signal.
NOTE: These pins are only active if the NibInt input pin is pulled "High".
Input
Transmit Section Timing Reference Clock Input pin:
The Transmit Section of the XRT72L56 can be configured to use this clock signal as the Timing
Reference. If the user has made this configuration selection, then the XRT72L56 will use this
clock signal to sample the data on the TxSer input pin.
NOTE: If this configuration is selected, then a 34.368 MHz clock signal must be applied to this
input pin.
Output Transmit Nibble Mode Output
If the user opts to operate the XRT72L56 in the Nibble-Parallel mode, then the XRT72L56 will
derive this clock signal from the selected Timing Reference for the Transmit Section of the chip
(e.g., either the TxInClk or the RxLineClk signals).
The XRT72L56 will use this signal to sample the data on the TxNib[3:0] input pins.
Output Transmit Overhead Bit Indicator Output:
This output pin will pulse "High" one-bit period prior to the time that the Transmit Section of the
XRT72L56 will be processing an Overhead bit. The purpose of this output pin is to warn the
Terminal Equipment that, during the very next bit-period, the XRT72L56 is going to be process-
ing an Overhead bit and will be ignoring any data that is applied to the TxSer input pin.
Output Transmit End of Frame Output Indicator:
The Transmit Section of the XRT72L56 will pulse this output pin "High" (for one bit-period),
when the Transmit Payload Data Input Interface is processing the last bit of a given E3 frame.
The purpose of this output pin is to alert the Terminal Equipment that it needs to begin trans-
mission of a new E3 frame to the XRT72L56 (e.g., to permit the XRT72L56 to maintain Transmit
E3 framing alignment control over the Terminal Equipment).
Input
Transmit Frame Reference Input:
The XRT72L56 permits the user to configure the Transmit Section to use this input pin as a
frame reference. If the user makes this configuration selection, then the Transmit Section will
initiate its transmission of a new E3 frame, upon the rising edge of this signal.
The purpose of this input pin is to permit the Terminal Equipment to maintain Transmit E3 Fram-
ing alignment control over the XRT72L56.
Output Loop-Timed Timing Reference Clock Output pin:
The Transmit Section of the XRT72L56 can be configured to use the RxLineClk signal as the
Timing Reference (e.g., loop-timing). If the user has made this configuration selection, then the
XRT72L56 will:
• Output a 34.368 MHz clock signal via this pin, to the Terminal Equipment.
• Sample the data on the TxSer input pin, upon the rising edge of this clock signal.
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