English
Language : 

XRT72L56 Datasheet, PDF (430/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
FIGURE 195. ILLUSTRATION OF THE E3, ITU-T G.832 FRAMING FORMAT
FA1
FA2
EM
TR
MA
NR
GC
60 Columns
530 Octet Payload
áç
PRELIMINARY
9 Rows
1 Byte
59 Bytes
When the Receive E3 Framer block detects the “FA1”
octet, and determines that this octet is immediately
followed by the “FA2” octet, then it will transition to the
FA1, FA2 Octet Verification state, per Figure 195.
The FA1, FA2 Octet Verification State
Once the Receive E3 Framer block has detected an
“0xF628” pattern (e.g., the concatenation of the FA1
and FA2 octets), it must verify that this pattern is in-
deed the “FA1” and “FA2” octets and not some other
set of bytes, within the E3 frame, mimicking the
Frame Alignment bytes. Hence, the purpose of the
FA1, FA2 Octet Verification state.
When the Receive E3 Framer block enters this state,
it will then quit performing its bit-by-bit search for the
Frame Alignment bytes. Instead, the Receive E3
Framer block will read in the two octets that occur 537
bytes (e.g., one E3 frame period later) after the candi-
date Frame Alignment patterns were first detected. If
these two bytes match the assigned values for the
“FA1” and “FA2” octets, then the Receive E3 Framer
block will conclude that it has found the Frame Align-
ment bytes and will then transition to the In-Frame
state. However, if these two bytes do not match the
assigned values for the “FA1” and “FA2” octets then
the Receive E3 Framer block will concluded that it
has been fooled by data mimicking the Frame Align-
ment bytes, and will transition back to the FA1, FA2
Octet Search state.
In Frame State
Once the Receive E3 Framer block enters the In-
Frame state, then it will cease performing Frame Ac-
quisition functions, and will proceed to perform Fram-
ing Maintenance functions. Therefore, the operation
of the Receive E3 Framer block, while operating in
the In-Frame state, can be found in Section 5.3.2.2
(The Framing Maintenance Mode).
OOF (Out of Frame) Condition State
If the Receive E3 Framer while operating in the In-
Frame state detects four (4) consecutive frames,
which do not have the valid Frame Alignment (FA1
and FA2 octet) patterns, then it will transition into the
OOF Condition State. The Receive E3 Framer
block’s operation, while in the OOF condition state is
a unique mix of Framing Maintenance and Framing
Acquisition operation. The Receive E3 Framer block
will exhibit some Framing Acquisition characteristics
by attempting to locate (once again) the Frame Align-
ment octets. However, the Receive E3 Framer block
will also exhibit some Frame Maintenance behavior
by still using the most recent frame synchronization
for its overhead byte and payload byte processing.
The Receive E3 Framer block will inform the Micro-
processor/Microcontroller of its transition from the In-
Frame state to the OOF Condition state, by generat-
ing a Change in OOF Condition Interrupt. When this
occurs, Bit 3 (OOF Interrupt Status), within the Rx E3
411