XRT72L56 Datasheet, PDF (226/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
FIGURE 80. A SIMPLE ILLUSTRATION OF THE RECEIVE DS3 FRAMER BLOCK AND THE ASSOCIATED PATHS TO THE
OTHER FUNCTIONAL BLOCKS
To Receive DS3 HDLC
Buffer
Receive Overhead Data
Output Interface
Receive Payload Data
Output Interface
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From Receive DS3
LIU Interface Block
Once the B3ZS (or AMI) encoded data has been de-
coded into a binary data-stream, the Receive DS3
Framer block will use portions of this data-stream in
order to synchronize itself to the remote terminal
equipment. At any given time, the Receive DS3
Framer block will be operating in one of two modes.
• The Frame Acquisition Mode: In this mode, the
Receive DS3 Framer block is trying to acquire syn-
chronization with the incoming DS3 frames, or
• The Frame Maintenance Mode: In this mode, the
Receive DS3 Framer block is trying to maintain
frame synchronization with the incoming DS3
Frames.
Figure 81 presents a State Machine diagram that de-
picts the Receive DS3 Framer block's DS3 Frame Ac-
quisition/Maintenance Algorithm.
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