XRT72L56 Datasheet, PDF (442/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
the FEBE bit-field set to “1”) that have occurred since
the last read of this register. This register is reset-up-
on-read.
6.3.2.9 Receiving the Trail Trace Buffer Mes-
sages
The XRT72L56 Framer IC device contains 16 bytes
worth of Transmit Trail Trace Buffers, and 16 bytes
worth of Receive Trail Trace Buffers, as described be-
low. The role of the Transmit Trail Trace Buffers are
described in Section 5.2.4.2..
The XRT72L56 DS3/E3 Framer IC contains 16 Re-
ceive Trail Trace Buffer registers (e.g., RxTTB-0
through RxTTB-15). The purpose of these registers
are to receive and store the incoming Trail Access
Point Identifier from the Remote Transmitting Termi-
nal.
The Local Receiving Terminal will use this information
to verify that it is still receiving data from its intended
transmitter. The specific use of these registers fol-
lows.
For Trail Trace Buffer purposes, the Remote Transmit
E3 Framer block will group 16 consecutive E3 frames
into a Trail Trace Buffer super-frame. When the Re-
mote Transmit E3 Framer is generating the first E3
frame, within a Trail Trace Buffer super-frame, it will
insert the value [1, C6, C5, C4, C3, C2, C1, C0], into
the TR byte-field of this Outbound E3 frame. The re-
maining 15 TR byte-fields (within this Trail Trace Buff-
er super-frame) will consists of ASCII characters that
are required for the E.164 numbering format.
When the Local Receive E3 Framer block receives an
E3 frame, containing a value in the TR byte that has a
“1” in the MSB position, then it (the Receive E3 Fram-
er block) will write this value into the RxTTB-0 Regis-
ter (Address = 0x1C). Once this occurs, the Receive
E3 Framer block will notify the Microprocessor of this
new incoming Trail Trace Buffer message by generat-
ing the Change in Trail Trace Buffer Message inter-
rupt. The Receive E3 Framer block will also set bit 6
(TTB Change Interrupt Status) within the Rx E3
Framer Interrupt Status Register - 2, as depicted be-
low.
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Not Used
TTB
Change
Interrupt
Status
Not Used
FEBE
Interrupt
Status
FERF
Interrupt
Status
RO
RUR
RO
RUR
RUR
0
0
0
0
0
BIT 2
BIT 1
BIP-8
Error Interrupt
Status
Framing
Byte Error
Interrupt
Status
RUR
RUR
0
0
BIT 0
RxPld
Mis
Interrupt
Status
RUR
0
The contents of the TR byte-field, in the very next E3
frame will be written into the Rx TTB-1 Register (Ad-
dress = 0x1D), and so on until all 16 bytes have been
received.
NOTES:
1. Anytime the Receive E3 Framer block receives an
E3 frame that contains an octet in the TR byte-field,
with a “1” in the MSB (Most Significant Bit) position,
then the Receive E3 Framer block will (1) write the
contents of the TR byte-field (in this E3 frame) into
the RxTTB-0 Register,
2. It will generate the Change in Trail Trace Buffer
Interrupt. The Receive E3 Framer will do these
things independent of the number of E3 frames that
have been received since the last occurrence of the
Change in Trail Trace Buffer Interrupt. Hence, the
user, when writing data into the Tx TTB registers,
must take care to insure that only the Tx TTB-0 reg-
ister contains an octet with a “1” in the MSB posi-
tion. All remaining Tx TTB registers (e.g., TxTTB-1
through TxTTB-15) must contain octets with a “0” in
the MSB position.
3. The Framer IC will not verify the CRC-7 value that
is written into the Rx TTB-0” register. It is up to the
user’s system hardware and/or software to perform
this verification.
6.3.3 The Receive HDLC Controller Block
The Receive E3 HDLC Controller block can be used
to receive message-oriented signaling (MOS) type
data link messages from the remote terminal equip-
ment.
The MOS types of HDLC message processing is dis-
cussed in detail below.
The Message Oriented Signaling (e.g., LAP-D)
Processing via the Receive DS3 HDLC Controller
block
The LAPD Receiver (within the Receive E3 HDLC
Controller block) allows the user to receive PMDL
messages from the remote terminal equipment, via
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