XRT72L56 Datasheet, PDF (210/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
TABLE 32: THE RELATIONSHIP BETWEEN THE CONTENTS OF BIT 3 (TX LOS) WITHIN THE TX DS3 CONFIGURATION
REGISTER, AND THE RESULTING TRANSMIT DS3 FRAMER BLOCK'S ACTION
BIT 3
0
1
TRANSMIT DS3 FRAMER'S ACTION
Normal Operation:
The Overhead bits are either internally generated, or they are inserted via the Transmit Overhead Data Input
Interface or the Transmit HDLC Controller blocks. The Payload bits are received from the Transmit Payload
Data Input Interface.
Transmit LOS Pattern:
When this command is invoked the Transmit DS3 Framer will do the following.
• Set all of the overhead bits to "0" (including the M, F, and P bits)
Overwrite the DS3 payload bits with an all zeros pattern.
NOTE: When this bit is set, it overrides all of the other bits in
this register.
4.2.4.2.1.6 FERF (Far-End Receive Failure) on
LOS - Bit 2
This Read/Write bit-field allows the user to configure
the Transmit DS3 Framer block to automatically gen-
erate a Yellow Alarm if the Near-End Receive Section
(of the XRT72L56) detects a LOS (Loss of Signal)
Condition.
Writing a "1" to this bit-field enables this feature. Writ-
ing a "0" to this bit-field disables this feature.
4.2.4.2.1.7 FERF (Far-End Receive Failure) on
OOF - Bit 1
This Read/Write bit-field allows the user to configure
the Transmit DS3 Framer block to automatically gen-
erate a Yellow Alarm if the Near-End Receive Section
(of the XRT72L56) detects an OOF (Out-of-Frame)
Condition.
Writing a "1" to this bit-field enables this feature. Writ-
ing a "0" to this bit-field disables this feature.
4.2.4.2.1.8 FERF (Far-End Receive Failure) on
AIS - Bit 0
This Read/Write bit-field allows the user to configure
the Transmit DS3 Framer block to automatically gen-
erate a Yellow Alarm if the Near-End Receive Section
(of the XRT72L56) detects an AIS (Alarm Indication
Signal) pattern.
Writing a "1" to this bit-field enables this feature. Writ-
ing a "0" to this bit-field disables this feature.
4.2.4.2.1.9 Transmitting FEBE (Far-End Block
Error) Values
By default, the Transmit DS3 Framer block will set the
three (3) FEBE bit-fields to [1, 1, 1] if all of the follow-
ing conditions are true.
• The Local Receive DS3 Framer block detects no P-
Bit Errors.
• The Local Receive DS3 Framer block detects no
CP-Bit Errors
Conversely, the Transmit DS3 Framer block will set
the three (3) FEBE bit-fields to a value other than [1,
1, 1] if any one of the following conditions are true.
• The Local Receive DS3 Framer block detects a P-
bit Error in the most recently received DS3 frame.
• The Local Receive DS3 Framer block detects a
“CP” bit Error in the most recently received DS3
frame.
4.2.4.2.2 Generating Errored DS3 Frames
The Transmit DS3 Framer block permits the user to
insert errors into the framing and error detection over-
head bits (e.g., the P, M and F-bits) of the outbound
DS3 data stream in order to support Far-End Equip-
ment testing. The user can exercise this option by
writing data to any of the numerous Transmit DS3
Mask Registers. These Mask Registers and their
comprising bit-fields are defined below.
TX DS3 M-BIT MASK REGISTER, ADDRESS = 0X35
BIT 7
TxFEBE
DAT[2]
R/W
X
BIT 6
TxFEBE
DAT[1]
R/W
X
BIT 5
TxFEBE
DAT[0]
R/W
X
BIT 4
FEBE Reg
Enable
R/W
X
BIT 3
BIT2
BIT 1
BIT 0
TxErr PBit MBit Mask(2) MBit Mask(1) MBit Mask(0)
R/W
R/W
R/W
R/W
X
X
X
X
191