XRT72L56 Datasheet, PDF (227/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
XRT72L56
REV. P1.1.2
FIGURE 81. THE STATE MACHINE DIAGRAM FOR THE RECEIVE DS3 FRAMER BLOCK'S FRAME ACQUISITION/MAIN-
TENANCE ALGORITHM
F-Bit Search
OOF Criteria
based upon values
for F-Sync Algo
and M-Sync Algo
10 Consecutive F-bits
Correctly Received
M-Bit Search
F-Bit Synch
Achieved
M-bits Correctly
Detected for 3
Consecutive M-Frames
(Framing on Parity is
Not Selected)
Parity Error in
2 out of 5 frames
M-bits Correctly
Detected for 3
Consecutive M-Frames
(Framing on Parity is
Selected)
In-Frame
RxOOF pin
is Negated.
Valid Parity
Parity Check
(Only if Framing
on Parity is
Selected)
4.3.2.1 Frame Acquisition Mode Operation
The Receive DS3 Framer block will be performing
Frame Acquisition operation while it is operating in
any of the following states (per the DS3 Frame Acqui-
sition/Maintenance algorithm State Machine diagram,
as depicted in Figure 81.)
• The F-bit Search state
• The M-bit Search state
• The P-Bit Check state (optional)
Once the Receive DS3 Framer block enters the In-
Frame state (per Figure 81), then it will begin Frame
Maintenance operation.
When the Receive DS3 Framer block is in the frame-
acquisition mode, it will begin to look for valid DS3
frames by first searching for the F-bits in the incoming
DS3 data stream. At this initial point the Receive DS3
Framer block will be operating in the F-Bit Search
state within the DS3 Frame Acquisition/Maintenance
algorithm state machine diagram (see Figure 81).
Recall from the discussion in Section 4.1, that each
DS3 F-frame consists of four (4) F-bits that occur in a
repeating 1001 pattern. The Receive DS3 Framer
block will attempt to locate this F-bit pattern by per-
forming five (5) different searches in parallel. The F-
bit search has been declared successful if at least 10
consecutive F-bits are detected. After the F-bit match
has been declared, the Receive DS3 Framer block
will then transition into the M-Bit Search state within
the DS3 Frame Acquisition/Maintenance algorithm
(per Figure 81). When the Receive DS3 Framer block
reaches this state, it will begin searching for valid M-
bits. Recall from the discussion in Section 3.1 that
each DS3 M-frame consists of three (3) M-bits that
occur in a repeating 010 pattern. The M-bit search is
declared successful if three consecutive M-frames (or
21 F-frames) are detected correctly. Once this occurs
an M-frame lock is declared, and the Receive DS3
Framer block will then transition to the In-Frame state.
At this point, the Receive DS3 Framer block will de-
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