XRT72L56 Datasheet, PDF (364/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
tion, it will still rely on the old framing alignment for E3
payload data extraction, etc.
However, if the Receive E3 Framer had to change
alignment, in order to re-acquire frame synchroniza-
tion, then this interrupt will occur.
Enabling and Disabling the Change of Framing
Alignment Interrupt
The user can enable or disable the Change of Fram-
ing Alignment Interrupt by writing the appropriate val-
ue into Bit 4 (COFA Interrupt Enable), within the Rx
E3 Interrupt Enable Register - 1.
RXE3 INTERRUPT ENABLE REGISTER - 1 (ADDRESS = 0X12)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Not Used
COFA
Interrupt
Enable
OOF
Interrupt
Enable
RO
RO
RO
R/W
R/W
0
0
0
X
0
BIT 2
LOF
Interrupt
Enable
R/W
0
BIT 1
LOS
Interrupt
Enable
R/W
0
BIT 0
AIS
Interrupt
Enable
R/W
0
Writing a “1” into this bit-field enables the Change of
Framing Alignment Interrupt. Conversely, writing a
“0” into this bit-field disables the Change of Framing
Alignment Interrupt.
Servicing the Change of Framing Alignment Inter-
rupt
Whenever the XRT72L56 Framer IC generates this
interrupt, it will do the following.
• It will assert the Interrupt Request output pin (INT)
by driving it “Low”.
• It will set Bit 4 (COFA Interrupt Status), within the
Rx E3 Interrupt Status Register -1, to “1”, as indi-
cated below.
RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Not Used
COFA
Interrupt
Status
OOF
Interrupt
Status
RO
RO
RO
RUR
RUR
0
0
0
1
0
BIT 2
LOF
Interrupt
Status
RUR
0
BIT 1
LOS
Interrupt
Status
RUR
0
BIT 0
AIS
Interrupt
Status
RUR
0
5.3.6.2.6 The Change in Receive FERF Condi-
tion Interrupt
If the Change in Receive FERF Condition Interrupt is
enabled, then the XRT72L56 Framer IC will generate
an interrupt in response to either of the following con-
ditions.
1. When the XRT72L56 Framer IC declares a FERF
(Far-End Receive Failure) Condition, and
2. When the XRT72L56 Framer IC clears the FERF
condition.
Conditions causing the XRT72L56 Framer IC to
declare an FERF Condition.
• If the XRT72L56 Framer IC begins receiving E3
frames which have the “A” bit set to “1”).
Conditions causing the XRT72L56 Framer IC to
clear the AIS Condition.
• If the XRT72L56 Framer IC begins receiving E3
frames that do NOT have the “A” bit set to “1”.
Enabling and Disabling the Change in Receive
AIS Condition Interrupt
The user can enable or disable the Change in Re-
ceive FERF Condition Interrupt, by writing the appro-
priate value into Bit 3 (FERF Interrupt Enable), within
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