XRT72L56 Datasheet, PDF (146/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
FRAME PARITY ERRORS - ONE-SECOND ACCUMULATOR REGISTER - LSB (ADDRESS = 0X71)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Frame Parity Error Count - Low Byte
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
This Read-Only register, along with the Frame Parity
Errors - One-Second Accumulator Register - MSB
(Address = 0x70) contains a 16-bit representation of
the number of Frame Parity Errors that have been de-
tected by the Receive DS3/E3 Framer block, within
the last one-second sampling period. This register
contains the LSB (or Lower-Byte) value of this 16 bit
expression.
NOTES:
1. For DS3 applications, the “Frame-Parity” Errors -
One Second Accumulator” register contains the
number of “P-bit” errors that have been detected in
the last one-second sampling period.
2. For E3, ITU-T G.751 applications, the “Frame-Par-
ity” Error - One Second Accumulator” register con-
tains the number of BIP-4 errors that have been
detected in the last one-second sampling period.
3. For E3, ITU-T G.832 applications, the “Frame-Par-
ity Error - One Second Accumulator” register con-
tains the number of BIP-8 errors that have been
detected in the last one-second sampling period.
2.4.8.17 One-Second Frame CP-Bit Error Accu-
mulator Register - MSB
FRAME CP-BIT ERRORS - ONE-SECOND ACCUMULATOR REGISTER - MSB (ADDRESS = 0X72)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP Bit Error Count - High Byte
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
This Read-Only register, along with the Frame CP-Bit
Error - One-Second Accumulator Register - LSB (Ad-
dress = 0x73) contains a 16-bit representation of the
number of CP Bit Errors tjhat have been detected by
the Receive DS3/E3 Framer block, within the last
one-second sampling period. This register contains
the MSB (or Upper Byte) value of this 16-bit expres-
sion.
NOTE: This register is only active if the Channel has been
configured to operate in the DS3, C-bit Parity framing for-
mat.
2.4.8.18 One-Second Frame CP-Bit Error Accu-
mulator Register - LSB
FRAME PARITY ERRORS - ONE-SECOND ACCUMULATOR REGISTER - LSB (ADDRESS = 0X73)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP Bit Error Count - Low Byte
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0
This Read-Only register, along with the Frame CP-Bit
Error - One-Second Accumulator Register - MSB (Ad-
dress = 0x72) contains a 16-bit representation of the
number of CP Bit Errors tjhat have been detected by
the Receive DS3/E3 Framer block, within the last
one-second sampling period. This register contains
the LSB (or Lower Byte) value of this 16-bit expres-
sion.
NOTE: This register is only active if the Channel has been
configured to operate in the DS3, C-bit Parity framing for-
mat.
127