XRT72L56 Datasheet, PDF (428/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
FIGURE 193. A SIMPLE ILLUSTRATION OF THE RECEIVE E3 FRAMER BLOCK AND THE ASSOCIATED PATHS TO THE
OTHER FUNCTIONAL BLOCKS
To Receive E3 HDLC
Buffer
Receive Overhead Data
Output Interface
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From Receive E3
LIU Interface Block
Receive Payload Data
Output Interface
Once the HDB3 (or AMI) encoded data has been de-
coded into a binary data-stream, the Receive E3
Framer block will use portions of this data-stream in
order to synchronize itself to the remote terminal
equipment. At any given time, the Receive E3 Fram-
er block will be operating in one of two modes.
• The Frame Acquisition Mode: In this mode, the
Receive E3 Framer block is trying to acquire syn-
chronization with the incoming E3 frame, or
• The Frame Maintenance Mode: In this mode, the
Receive E3 Framer block is trying to maintain frame
synchronization with the incoming E3 Frames.
Figure 194 presents a State Machine diagram that
depicts the Receive E3 Framer block's E3/ITU-T
G.832 Frame Acquisition/Maintenance Algorithm.
6.3.2.1 The Framing Acquisition Mode
The Receive E3 Framer block is considered to be op-
erating in the Frame Acquisition Mode, if it is operat-
ing in any one of the following states within the E3
Frame Acquisition/Maintenance Algorithm per
Figure 194.
• FA1, FA2 Octet Search State
• FA1, FA2 Octet Verification State
• OOF Condition State
• LOF Condition State
Each of these Framing Acquisition states, within the
Receive E3 Framer Framing Acquisition/Maintenance
State Machine are discussed below.
The FA1, FA2 Octet Search State
When the Receive E3 Framer block is first powered
up, it will be operating in the FA1, FA2 Octet Search
state. While the Receive E3 Framer is operating in
this state, it will be performing a bit-by-bit search for
the FA1 and FA2 Framing Alignment octets. FA1 is
assigned the value “0xF6”, and FA2 is assigned the
value of “0x28”. Figure 195, which presents an illus-
tration of the E3, ITU-T G.832 Framing Format, indi-
cates that these two octets will occur at the beginning
of each E3 frame, and that the FA2 octet will appear
immediately after the FA1 octet.
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