XRT72L56 Datasheet, PDF (107/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
XRT72L56
REV. P1.1.2
2.4.3.7 Receive E3 LAPD Control Register (E3,
ITU-T G.832)
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
DL from NR
RxLAPD
Enable
RxLAPD
Interrupt
Enable
RxLAPD
Interrupt
Status
RO
RO
RO
RO
R/W
R/W
R/W
RUR
0
0
0
0
0
0
0
0
Bit 3 - DL from NR
This Read/Write bit-field allows the user to specify
whether the LAPD Receiver should retrieve the bytes,
comprising the incoming LAPD Message frame, from
the NR byte-field, or from the GC byte-field, within
each incoming E3 frame.
Writing a "1" configures the LAPD Receiver to re-
trieve the incoming LAPD Message frame octets from
the NR byte-field, within each incoming E3 frame.
Writing a "0" configures the LAPD Receiver to re-
trieve the incoming LAPD Message frame octets from
the GC byte.
Bit 2 - RxLAPD Enable
This Read/Write bit-field allows the user to enable or
disable the LAPD Receiver, for reception of incoming
LAPD Message frames from the Remote LAPD
Transmitter.
Writing a "1" to this bit-field enables the LAPD Re-
ceiver. Writing a "0" to this bit-field disables the LAPD
Receiver.
Bit 1 - RxLAPD (Received LAPD Message) Inter-
rupt Enable
This Read/Write bit-field allows the user to enable or
disable the Received LAPD Message frame interrupt.
Setting this bit-field to "1" enables this interrupt. Set-
ting this bit-field to "0" disables this interrupt. For
more information on this interrupt, please see Section
5.3.3.
Bit 0 - RxLAPD (Received LAPD Message) Inter-
rupt Status
This Reset-upon-Read bit-field will be set to "1" if the
Receipt of New LAPD Message frame interrupt has
occurred since the last read of this register.
The Receive DS3/E3 Framer block will generate this
Receipt of New LAPD Message frame interrupt when
the LAPD Receiver has received a complete LAPD
Message frame from the Remote LAPD Transmitter.
NOTE: Please see section 5.3.6.1.12 for a more detailed
discussion of this interrupt.
2.4.3.8 Receive E3 LAPD Status Register (E3,
ITU-T G.832
RXE3 LAPD STATUS REGISTER (ADDRESS = 0X19)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used Rx ABORT
RxLAPDType[1:0]
RxCR
Type
RxFCS
Error
End of
Message
Flag
Present
RO
RO
RO
RO
R/W
R/W
R/W
RUR
0
0
0
0
0
0
0
0
Bit 6 - Rx Abort
This Read-Only bit-field indicates whether or not the
LAPD Receiver is currently detecting an abort se-
quence (e.g., a string of 7 consecutive "1’s").
This bit-field is set to "1" if the LAPD Receiver is cur-
rently detecting an abort sequence in the incoming
LAPD Channel. Conversely, this bit-field is set to "0"
if the LAPD Receiver has not detected an abort se-
quence, since the last read of this register.
Bit 5, 4 - RxLAPD Type[1:0]
These two Read-Only bit-fields combine to indicate
the type and size of LAPD Message frame that has
been received by the LAPD Receiver. The following
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