XRT72L56 Datasheet, PDF (275/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
• The Serial or the Nibble-Parallel Interface Mode
• The Loop-Timing or the TxInClk (Local Timing)
Mode
Further, if the XRT72L56 has been configured to op-
erate in the Local-Timing mode, then the user has
two additional options.
• The XRT72L56 is the Frame Master (e.g., it dictates
when the Terminal Equipment will initiate the trans-
mission of data within a new E3 frame).
• The XRT72L56 is the Frame Slave (e.g., the Termi-
nal Equipment will dictate when the XRT72L56 ini-
tiates the transmission of a new E3 frame).
Given these three set of options, the Transmit Termi-
nal Input Interface can be configured to operate in
one of the six (6) following modes.
• Mode 1 - Serial/Loop-Timed Mode
• Mode 2 - Serial/Local-Timed/Frame Slave Mode
• Mode 3 - Serial/Local-Timed/Frame Master Mode
• Mode 4 - Nibble/Loop-Timed Mode
• Mode 5 - Nibble/Local-Timed/Frame Slave Mode
• Mode 6 - Nibble/Local-Timed/Frame Master Mode
Each of these modes are described, in detail, below.
5.2.1.1 Mode 1 - The Serial/Loop-Timing Mode
The Behavior of the XRT72L56
If the XRT72L56 has been configured to operate in
this mode, then the XRT72L56 will behave as follows.
A. Loop-Timing (Uses the RxLineClk signal as the
Timing Reference)
Since the XRT72L56 is configured to operate in the
loop-timed mode, the Transmit Section of the
XRT72L56 will use the RxLineClk input clock signal
(e.g., the Recovered Clock signal, from the LIU) as its
timing source. When the XRT72L56 is operating in
this mode it will do the following.
1. It will ignore any signal at the TxInClk input pin.
2. The XRT72L56 will output a 34.368MHz clock
signal via the RxOutClk output pin. This clock
signal functions as the Transmit Payload Data
Input Interface block clock signal.
3. The XRT72L56 will use the rising edge of the
RxOutClk signal to latch in the data residing on
the TxSer input pin.
B. Serial Mode
The XRT72L56 will accept the E3 payload data from
the Terminal Equipment, in a serial-manner, via the
TxSer input pin The Transmit Payload Data Input In-
terface will latch this data into its circuitry, on the ris-
ing edge of the RxOutClk output clock signal.
C. Delineation of outbound E3 frames
The XRT72L56 will pulse the TxFrame output pin
"High" for one bit-period coincident with the
XRT72L56 processing the last bit of a given E3
frame.
D. Sampling of Payload Data, from the Terminal
Equipment
In Mode 1, the XRT72L56 will sample the data at the
TxSer input, on the rising edge of RxOutClk.
Interfacing the Transmit Payload Data Input Inter-
face block of the XRT72L56 to the Terminal Equip-
ment for Mode 1 Operation
Figure 100 presents an illustration of the Transmit
Payload Data Input Interface block (within the
XRT72L56) being interfaced to the Terminal Equip-
ment, for Mode 1 operation.
FIGURE 100. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT72L56 FOR MODE 1 (SERIAL/LOOP-TIMED) OPERATION
E3_Clock_In
E3_Data_Out
Tx_Start_of_Frame
E3_Overhead_Ind
Terminal Equipment
34.368 MHz
RxOutClk
TxSer
TxFrame
TxOH_Ind
NibInt
XRT72L5x E3 Framer
256