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XRT72L56 Datasheet, PDF (399/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
FIGURE 172. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT OVERHEAD DATA
INPUT INTERFACE (METHOD 2)
34.368MHz Clock Source
E3_Clock_In
E3_OH_Enable
E3_OH_Out
Tx_Start_of_Frame
Insert_OH
TxInClk
TxOHEnable
TxOH RxLineCl,k
TxOHFrame
TxOHIns
34.368MHz
Clock Source
Terminal Equipment
XRT72L5x E3 Framer
Method 2 Operation of the Terminal Equipment
If the Terminal Equipment intends to insert any over-
head data into the Outbound E3 data stream (via the
Transmit Overhead Data Input Interface), then it is ex-
pected to do the following.
1. To sample the state of both the TxOHFrame and
the TxOHEnable input signals, via the
E3_Clock_In (e.g., either the TxInClk or the
RxOutClk signal of the XRT72L56) signal. If the
Terminal Equipment samples the TxOHEnable
signal "High", then it knows that the XRT72L56 is
about to process an overhead bit. Further, if the
Terminal Equipment samples both the TxO-
HFrame and the TxOHEnable pins "High" (at the
same time) then the Terminal Equipment knows
that the XRT72L56 is about to process the first
overhead bit, within a new E3 frame.
2. To keep track of the number of times that the
TxOHEnable signal has been sampled "High"
since the last time both the TxOHFrame and the
TxOHEnable signals were sampled "High". By
doing this, the Terminal Equipment will be able to
keep track of which overhead bit the Transmit
Overhead Data Input Interface is about ready to
process. From this, the Terminal Equipment will
know when it should assert the TxOHIns input pin
and place the appropriate value on the TxOH
input pins of the XRT72L56.
Table 76 also relates the number of TxOHEnable out-
put pulses (that have occurred since both the TxO-
HFrame and TxOHEnable pins were sampled "High")
to the E3 overhead bit, that is being processed.
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