XRT72L56 Datasheet, PDF (453/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
TABLE 89: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN RXOHCLK, (SINCE
RXOHFRAME WAS LAST SAMPLED "HIGH") TO THE E3 OVERHEAD BIT, THAT IS BEING OUTPUT VIA THE RXOH
OUTPUT PIN
NUMBER OF RISING CLOCK EDGES IN RXOHCLK
45
46
47
48
49
50
51
52
53
54
55
THE OVERHEAD BIT BEING OUTPUT BY THE
XRT72L56
NR Byte - Bit 2
NR Byte - Bit 1
NR Byte - Bit 0
GC Byte - Bit 7
GC Byte - Bit 6
GC Byte - Bit 5
GC Byte - Bit 4
GC Byte - Bit 3
GC Byte - Bit 2
GC Byte - Bit 1
GC Byte - Bit 0
Figure 205 presents the typical behavior of the Re-
ceive Overhead Data Output Interface block, when
Method 1 is being used to sample the incoming E3
overhead bits.
FIGURE 205. ILLUSTRATION OF THE SIGNALS THAT ARE OUTPUT VIA THE RECEIVE OVERHEAD OUTPUT INTERFACE
(FOR METHOD 1).
RxOHClk
RxOHFrame
RxOH
FA1, Bit 7
FA1, Bit 6
FA1, Bit 5
FA1, Bit 4
FA1, Bit 3
Terminal Equipment should sample
the “RxOHFrame” and “RxOH” signals
here.
Recommended Sampling Edges
6.3.4.2 Method 2 - Using RxOutClk and the
RxOHEnable signals
434