XRT72L56 Datasheet, PDF (181/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
XRT72L56
REV. P1.1.2
FIGURE 50. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT72L56 FOR MODE 4 (NIBBLE-PARALLEL/LOOP-TIMED) OPERATION
DS3_Nib_Clock_In
DS3_Data_Out[3:0
]
Tx_Start_of_Fram
Terminal
11.184MHz
4
VCC
TxNibClk
TxNib[3:0]
TxNibFrame
44.736MHz
RxLineClk
NibInt
XRT72L5x DS3
Mode 4 Operation of the Terminal Equipment
When the XRT72L56 is operating in this mode, it will
function as the source of the 11.184MHz (e.g., the
44.736MHz clock signal divided by "4") clock signal,
that will be used as the Terminal Equipment Interface
clock by both the XRT72L56 and the Terminal Equip-
ment.
The Terminal Equipment will output the payload data
of the outbound DS3 data stream via its
DS3_Data_Out[3:0] pins on the rising edge of the
11.184MHz clock signal at the DS3_Nib_Clock_In in-
put pin.
The XRT72L56 will latch the outbound DS3 data
stream (from the Terminal Equipment) on the rising
edge of the TxNibClk output clock signal. The
XRT72L56 will indicate that it is processing the last
nibble, within a given DS3 frame, by pulsing its TxNib-
Frame output pin "High" for one TxNibClk clock peri-
od. When the Terminal Equipment detects a pulse at
its Tx_Start_of_Frame input pin, it is expected to
transmit the first nibble, of the very next outbound
DS3 frame to the XRT72L56 via the
DS3_Data_Out[3:0] (or TxNib[3:0] pins).
Finally, for the Nibble-Parallel Mode operation, the
XRT72L56 will continuously pull the TxOHInd output
pin "Low".
The behavior of the signals between the XRT72L56
and the Terminal Equipment for DS3 Mode 4 Opera-
tion is illustrated in Figure 51.
162