XRT72L56 Datasheet, PDF (206/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56 SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT2
BIT 1
BIT 0
Local Loop-
back
DS3/E3*
R/W
R/W
0
1
Internal
LOS
Enable
R/W
1
RESET
R/W
0
Interrupt
Enable
Reset
R/W
1
Frame
Format
R/W
X
TimRefSel[1:0]
R/W
R/W
X
X
This action will prevent the LAPD Transmitter from
generating its own one-second interrupts.
This can be done by writing a "1" into Bit 0 of the
Block Interrupt Enable Register, as depicted below.
2. Enable the One-Second Interrupt
BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04)
BIT 7
BIT 6
BIT 5
BIT 4
RxDS3/E3
Interrupt
Enable
R/W
RO
0
0
Not Used
RO
RO
0
0
3. Write the new message into the Transmit LAPD
Message buffer immediately after the occurrence
of the One-Second interrupt.
By timing the writes to the Transmit LAPD Message
buffer to occur immediately after the occurrence of
the One-Second interrupt, the user avoids conflicting
with the one-second transmissions of the LAPD Mes-
sage, and will transmit the correct messages to the
remote LAPD Receiver.
4.2.4 The Transmit DS3 Framer Block
4.2.4.1 Brief Description of the Transmit DS3
Framer
The Transmit DS3 Framer block accepts data from
any of the following three sources, and uses it to form
the DS3 data stream.
• The Transmit Payload Data Input block
• The Transmit Overhead Data Input block
• The Transmit HDLC Controller block
• The Internal Overhead Data Generator
The manner in how the Transmit DS3 Framer block
handles data from each of these sources is described
below.
Handling of data from the Transmit Payload Data
Input Interface
For DS3 applications, all data that is input to the
Transmit Payload Data Input Interface will be inserted
into the payload bit positions within the outbound DS3
frames.
BIT 3
BIT2
BIT 1
BIT 0
TxDS3/E3
Interrupt
Enable
One Second
Interrupt
Enable
RO
RO
R/W
R/W
0
0
0
X
Handling of data from the Internal Overhead Bit
Generator
By default, the Transmit DS3 Framer block will inter-
nally generate the overhead bits. However, if the Ter-
minal Equipment inserts its own values for the over-
head bits (via the Transmit Overhead Data Input Inter-
face) or, if the user enables and employs the Transmit
DS3 HDLC Controller block, then these internally
generated overhead bits will be overwritten.
Handling of data from the Transmit Overhead Da-
ta Input Interface
For DS3 applications, the Transmit DS3 Framer block
automatically generates and inserts the framing align-
ment bits (e.g., the F and M bits) into the outbound
DS3 frames. Further, the Transmit DS3 Framer block
will automatically compute and insert the P-bits into
the outbound DS3 frames. Hence, the Transmit DS3
Framer block will not accept data from the Transmit
OH Data Input Interface block for the F, M and P bits.
However, the Transmit DS3 Framer block will accept
(and insert) data from the Transmit Overhead Data In-
put Interface for the following bit-fields.
• X-bits
• FEBE bits
• FEAC bits
• DL bits
• UDL bits
• CP bits
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