XRT72L56 Datasheet, PDF (392/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
TABLE 72: A LISTING OF THE OVERHEAD BITS WITHIN THE E3 FRAME, AND THEIR POTENTIAL SOURCES, WITHIN THE
XRT72L56 IC
OVERHEAD BIT
TR - Bit 3
INTERNALLY GENERATED
No
ACCESSIBLE VIA THE TRANSMIT OVERHEAD
DATA INPUT INTERFACE
Yes
BUFFER/REGISTER
ACCESSIBLE
Yes
TR - Bit 2
No
Yes
Yes
TR - Bit 1
No
Yes
Yes
TR - Bit 0
No
Yes
Yes
MA - Bit 7
Yes
Yes
Yes
MA - Bit 6
Yes
Yes
Yes
MA - Bit 5
Yes
Yes
Yes
MA - Bit 4
Yes
Yes
Yes
MA - Bit 3
Yes
Yes
Yes
MA - Bit 2
Yes
Yes
Yes
MA - Bit 1
Yes
Yes
Yes
MA - Bit 0
Yes
Yes
Yes
NR - Bit 7
No
Yes
Yes
NR - Bit 6
No
Yes
Yes
NR - Bit 5
No
Yes
Yes
NR - Bit 4
No
Yes
Yes
NR - Bit 3
No
Yes
Yes
NR - Bit 2
No
Yes
Yes
NR - Bit 1
No
Yes
Yes
NR - Bit 0
No
Yes
Yes
GC - Bit 7
No
Yes
Yes
GC - Bit 6
No
Yes
Yes
GC - Bit 5
No
Yes
Yes
GC - Bit 4
No
Yes
Yes
GC - Bit 3
No
Yes
Yes
GC - Bit 2
No
Yes
Yes
GC - Bit 1
No
Yes
Yes
GC - Bit 0
No
Yes
Yes
NOTES:
1. The XRT72L56 contains mask register bits that
permit the user to alter the state of the internally
generated value for these bits.
2. The Transmit LAPD Controller/Buffer can be config-
ured to be the source of the DL bits, within the Out-
bound E3 data stream.
In all, the Transmit Overhead Data Input Interface per-
mits the user to insert overhead data into the Out-
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