XRT72L56 Datasheet, PDF (1/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L56
JANUARY 2001
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
GENERAL DESCRIPTION
The XRT72L56, 6 Channel DS3/E3 Framer is de-
signed to accept “User Data” from the Terminal
Equipment and insert this data into the “payload” bit-
fields within an “outbound” DS3/E3 Data Stream.
The XRT72L56 DS3/E3 Framer support full-duplex
data flow between Terminal Equipment and an LIU
(Line Interface Unit) . The Framer will transmit, re-
ceive and process data in the DS3-C-bit Parity, DS3-
M13, E3-ITU-T G.751 and E3-ITU-T G.832 Framing
Formats.
In addition, XRT72L56 has 6 independent high speed
HDLC controllers both on the receive and transmit
data paths which can be optionally configured to sup-
port Framer Relay applications.
The Transmit Sections, include a Transmit Payload
Data Input Interface, a Transmit Overhead data Input
Interface Section, a Transmit HDLC Controller, a
Transmit DS3/E3 Framer block and a Transmit LIU In-
terface Block which permits the Terminal Equipment
to transmit data to a remote terminal.
The Receive Sections, consist of a Receive LIU Inter-
face, a Receive DS3/E3 Framer, a Receive HDLC
Controller, a Receive Payload Data Output Interface,
and a Receive Overhead Data Interface which allows
the local terminal equipment to receive data from re-
mote terminal equipment.
The Microprocessor Interface is used to configure the
Framer in different operating modes and monitor the
performance of the Framer.
The Performance Monitor Sections consist of a large
number of "Reset-upon-Read" and "Read-Only" reg-
isters that contain cumulative and "one-second" sta-
tistics that reflect the performance/status of the chan-
nels.
FEATURES
• Transmits, Receives and Processes data in the
DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and
E3-ITU-T G.832 Framing Formats.
• Per Channel High Speed HDLC Controllers.
• Interfaces to all Popular Microprocessors
• Extensive Performance Monitoring support.
• Available in a 388 Ball PBGA package
• 3.3V Power Supply with 5V Tolerant I/O
• Operating Temperature -40°C to +85°C
APPLICATIONS
• Digital Cross Connects
• CSU/DSU Equipment.
• ADD/Drop Multiplexers
• DS3/E3 Frame Relay Equipment
FIGURE 1. BLOCK DIAGRAM OF THE XRT72L56
Reset
TestMode
NibbleLnTF
TxOHEnable
TxOHClk
TxOHFrame
TxAISEn
TxOH
TxOHIns
T3/E3
Transmit
Overhead
Interface
TxLineClk[n:0]
TxPOS[n:0]
TxNEG[n:0]
RxLineClk[n:0]
RxPOS[n:0]
RxNEG[n:0]
ExtLOS
RxOHEnable[n:0]
RxOHClk[n:0]
RxOH[n:0]
RxRed[n:0]
RxOHFrame[n:0]
RxOOF[n:0]
LIU
Interface/
Controller
T3/E3
Receive
Overhead
Interface
Typical Channel n
Where n = 0, 1, 2, 3, 4 & 5
T3/E3 Transmit
Framer
T3/E3
transmit
Input
T3 FEAC & Data
Link Controller
Performance
Monitor
Interrupt
Controller
T3/E3 Receive
Framer
T3/E3
Receive
Output
HDLC
controller
uP
Interface
HDLC
controller
TxOHInd[n:0]
TxNibFrame[n:0]
TxFrame[n:0]
TxNibClk[n:0]
TxLnClk[n:0]
TxFrameRef[n:0]
TxNib[n:0]
TxSer[n:0]
A(11:0)
D(7:0)
ALE_AS
WR_R/W
CS
RDY_DTCK
Reset
INT
MOTO
RD_DS
RxClk[n:0]
RxOHind[n:0]
RxFrame[n:0]
RxNib[n:0]
RxSer[n:0]
RxOUTClk[n:0]
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