XRT72L56 Datasheet, PDF (344/486 Pages) Exar Corporation – SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
Table 63 presents the relationship between the con-
tents of RxLAPDType[1:0] and the type of message
received by the LAPD Receiver.
TABLE 63: THE RELATIONSHIP BETWEEN THE CONTENTS OF RXLAPDTYPE[1:0] BIT-FIELDS AND THE PMDL
MESSAGE TYPE/SIZE
RXLAPDTYPE[1:0] PMDL MESSAGE TYPE
PMDL MESSAGE SIZE
00
Test Signal Identification
76 Bytes
01
Idle Signal Identification
76 Bytes
10
CL Path Identification
76 Bytes
11
ITU-T Path Identification
82 Bytes
NOTE: Prior to reading in the PMDL Message from the
Receive LAPD Message buffer, the user is urged to read
the state of the RxLAPDType[1:0] bit-fields in order to deter-
mine the size of this message.
5. Inform the Local Microprocessor/External Cir-
cuitry of the receipt of the new LAPD Message
frame.
Finally, after the LAPD Receiver has received and
processed the newly received LAPD Message frame
(per steps 1 through 4, as described above), it will in-
form the local Microprocessor that a LAPD Message
frame has been received and is ready for user-sys-
tem handling. The LAPD Receiver will inform the Mi-
croprocessor/Microcontroller and the external circuit-
ry by:
• Generating a LAPD Message Frame Received
interrupt to the Microprocessor. The purpose of
this interrupt is to let the Microprocessor know that
the Receive LAPD Message buffer contains a new
PMDL Message that needs to be read and pro-
cessed. When the LAPD Receiver generates this
interrupt, it will set bit 0 (RxLAPD Interrupt Status)
within the Rx E3 LAPD Control Register to “1” as
depicted below.
)
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
RxLAPD
Enable
RxLAPD
RxLAPD
Interrupt Enable Interrupt Status
RO
RO
RO
RO
RO
R/W
R/W
RUR
0
0
0
0
0
0
0
1
• Setting Bit 1 (End of Message) within the Rx E3
LAPD Status Register, to “1” as depicted below.
RXE3 LAPD STATUS REGISTER (ADDRESS = 0X19)
BIT 7
Not Used
BIT 6
RxABORT
BIT 5
BIT 4
RxLAPDType[1:0]
RO
RO
RO
RO
0
0
0
0
BIT 3
RxCR
Type
RO
0
BIT 2
RxFCS
Error
RO
0
BIT 1
End of
Message
RO
1
BIT 0
Flag
Present
RO
0
In summary, Figure 143 presents a flow chart depict-
ing how the LAPD Receiver functions.
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