82870P2P64H2 Datasheet, PDF (70/217 Pages) –

Register Description
R
3.3
Hot Plug Controller Registers (Device 31)
3.3.1
The P64H2 hot plug controller allows PCI card removal, replacement and addition without
powering down the system. There are two hot plug controllers that are located on the secondary
bus; one for PCI Bus A and the other for PCI Bus B. The hot plug controller contains both PCI
Configuration registers and memory space registers. The MBAR Register (PCI offset 10h) and
MBARU Register (PCI offset 14h) provide the base address for the memory space registers.
PCI Configuration Registers
Table 16. Hot Plug Controller PCI Configuration Address Map (Device 31)
Address
Offset
00–01h
02–03h
04–05h
06–07h
08h
09–0Bh
10–13h
14–17h
2C–2Dh
2E–2Fh
34h
3C–3Dh
40h
41h
Symbol
VID
DID
PCICMD
PCISTS
RID
CC
MBAR
MBARU
SVID
SID
CAP_PTR
INTR
SID
HPFC
Register Name
Vendor ID
Device ID
PCI Command
PCI Status
Revision ID
Class Code
Memory Base
Memory Base Upper 32-bits
Subsystem Vendor ID
Subsystem ID
Capabilities Pointer
Interrupt Information
Slot ID
Ho Plug Frequency Control
Default
8086h
1462h
00h
0230h
11h
840h
0000000Ch
00000000h
0000h
0000H
64h
0100h
00h
00h
42–43h
MCNF
Miscellaneous Configuration
00X3h
44–45h
46h
47h
48–4Ah
50h
54–57h
64–65h
66–67h
68–6Bh
80–81H
FTR
SSEL
SSTS
SERR
MIDX
MDTA
XID
XCR
XSR
ABAR
Features
Slot Status Select
Slot Status
SERR Status
Alternate Memory Access Index Port
Alternate Memory Access Data Port
PCI-X Identifiers
PCI-X Command
PCI-X Status
Alternate Base
0000h
00H
XXh
00h
00h
00000000h
0007h
0000h
0003XXF8h
0000h
Access
RO
RO
R/W, RO
R/WC, RO
RO
RO
R/W, RO
R/W
R/WO
R/WO
RO
R/W, RO
R/W
R/W
R/W, R/WO,
RO
R/W
R/W
RO
R/WC
R/W
R/W
RO
RO
RO
R/W
70
Intel^® 82870P2 P64H2 Datasheet