82870P2P64H2 Datasheet, PDF (7/217 Pages) –

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4.2.7 Arbitration Among Multiple Split Completions..................................... 127
4.2.8 Transaction Termination as a PCI-X Target....................................... 127
4.2.9 Arbitration ........................................................................................... 127
4.2.10 System Initialization ............................................................................ 128
4.2.11 Bridge Buffer Requirements ............................................................... 129
4.2.12 Cycle Translation Between Interfaces ................................................ 129
4.2.12.1 Conventional PCI to PCI-X / Hub Interface ....................... 129
4.2.12.2 PCI-X to Conventional PCI (peer) / Hub Interface............. 130
4.2.13 Locked Transactions .......................................................................... 130
4.2.14 Error Support ...................................................................................... 130
4.2.15 Transaction Termination Translation Between Interfaces .................. 130
4.2.15.1 Behavior of Hub Interface Initiated Cycles to
PCI/PCI-X Receiving Immediate Terminations ................. 131
4.2.15.2 Behavior of Hub Interface Initiated Cycles to
PCI-X Receiving Split Terminations .................................. 132
4.2.15.3 Hub Interface Action on Immediate Responses to
PCI-X Split Completions.................................................... 133
4.2.16 Configuration Transactions................................................................. 134
4.3 Hot Plug Controllers ........................................................................................... 135
4.3.1 System Architecture............................................................................ 135
4.3.1.1 Output Control ................................................................... 135
4.3.1.2 Input Control...................................................................... 136
4.3.1.3 Stutter Mode...................................................................... 136
4.3.1.4 Serial Input Stream............................................................ 137
4.3.1.5 Serial Output Stream......................................................... 140
4.3.1.6 Power Sequencing ............................................................ 143
4.3.1.7 Arbitration .......................................................................... 146
4.3.1.8 Power-on and Reset Initialization ...................................... 146
4.3.1.9 PCI Card Initialization ........................................................ 147
4.3.1.10 Changing PCI Frequency/Modes ...................................... 147
4.3.2 Pin Multiplexing in Single and Dual Slot Modes.................................. 148
4.3.3 Single Slot Mode PCI Bus Effects ...................................................... 150
4.3.3.1 Driving Bus To Ground When PCI Card is
Disconnected..................................................................... 150
4.3.3.2 Aborting Outbound PCI Cycles When Card is
Disconnected..................................................................... 151
4.3.3.3 Special Note on M66EN in Single Slot Mode .................... 151
4.3.4 Generating SCI Instead of Interrupt.................................................... 151
4.3.5 Disabling the Hot Plug Controller........................................................ 151
4.4 Addressing ......................................................................................................... 152
4.4.1 I/O Window Addressing ...................................................................... 152
4.4.2 Memory Window Addressing.............................................................. 153
4.4.2.1 Memory Base and Limit Address Registers ...................... 153
4.4.2.2 Prefetchable Memory Base and Limit Address
Registers, Upper 32-bit Registers .................................... 153
4.4.3 VGA Addressing ................................................................................. 154
4.4.4 Configuration Addressing ................................................................... 155
Intel^® 82870P2 P64H2 Datasheet
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