82870P2P64H2 Datasheet, PDF (103/217 Pages) –

Register Description
R
3.4.3 Indirect Memory Space Registers
These registers are accessed indirectly using the IDX and WND Registers (see Section 3.4.2). To
access the indirect memory space, an 8-bit value is written to the IDX Register (i.e., address offset
shown in Table 20); this is a "pointer" to a 32-bit memory location. The 32-bit value can then be
read from the WND Register.
Table 20. I/OxAPIC Indirect Memory Space Register Address Map
Address
Offset
00h
01h
02h
03h
10h
11h
Symbol
ID
VS
ARBID
BCFG
RDL
RDH
Full Name
APIC ID
Version
Arbitration ID
Boot Configuration
Redirection Table Low DWord
Redirection Table High DWord
Default
Attribute
00000000h
R/W
00178020h
RO
00000000h
RO
00000000h
R/W
00010000h
R/W
00000000h
R/W
3.4.3.1
ID—APIC ID Register (D28,30: F0)
Offset:
00h
Default Value: 00000000h
Attribute:
Size:
R/W
32 bits
The APIC ID serves as a physical name of the APIC. The APIC bus arbitration ID for the APIC is
derived from its I/O APIC ID. This register is reset to zero on power up reset.
Bits
Description
31:28
27:24
23:0
Reserved
APIC ID (APICID). Software must program this value before using the APIC.
Reserved
Intel^® 82870P2 P64H2 Datasheet
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