82870P2P64H2 Datasheet, PDF (100/217 Pages) –

Register Description
R
3.4.1.12
XID—PCI-X Identifier Register (D28,30: F0)
Offset:
50–51h
Default Value: 0007h
Attribute:
Size:
RO
16 bits
Bits
Description
15:8 Next Pointer (XNPTR). Points to the next capabilities list pointer (empty)
7:0 Capability ID (XCID). Capabilities ID indicates PCI-X.
3.4.1.13
XCR—PCI-X Command Register (D28,30: F0)
Offset:
52h
Default Value: 0000h
Attribute:
Size:
RO
16 bits
Bits
15:0 Reserved
Description
3.4.1.14
XSR—PCI-X Status Register (D28,30: F0)
Offset:
54–57h
Default Value: 000300F0h (bus A)
000300E0h (bus B)
Attribute:
Size:
RO
32 bits
Bits
Description
31:21
20
19
18
17
16
15:8
7:3
2:0
Reserved
Device Complexity. Hardwired to 0; indicates that this is a simple device.
Unexpected Split Completion. This device will never see an unexpected split completion, as it
never generates any master cycles besides posted writes for MSI.
Split Completion Discarded. This device does not support Split Completion.
133MHz Capable. Hardwired to 1; indicates this device is 133 MHz capable.
64-bit Device. Hardwired to 1; indicates that this is a 64-bit device.
Bus Number. Indicate the bus number of the bus segment for this device. This value will match
the ‘primary bus number’ field from the attached bridge.
Device Number. Reflects the device number that has been hard-coded for the device. This
number will be
1Eh (30) = I/O APIC A
1Ch (28) = IO APIC B
Function Number. Reflects the function number for the device.
100
Intel^® 82870P2 P64H2 Datasheet