82870P2P64H2 Datasheet, PDF (37/217 Pages) –

Register Description
R
Address
Offset
50h
51h
52–53h
54–57h
58–5Bh
5C–5Fh
60–62h
63h
64–66h
67–6Bh
6C–6Dh
6E–6Fh
70–73h
74–77h
78–7Bh
7C–7Fh
80–83h
84–87h
88–8Bh
8C–8Fh
90–93h
94–97h
98–9Bh
9C–9Dh
E0–E3h
E4–E5h
E6–EFh
F0–F3h
F8–F9h
FA–FBh
FC–FDh
FE–FFh
Symbol
PX_CAPID
—
PX_SSTS
PX_BSTS
PX_USTC
PX_DSTC
RAS_STS
—
RAS_DI
—
RAS_PH
—
RAS_PAL
RAS_PAH
RAS_PDL
RAS_PDH
RAS_HH
RAS_HAL
RAS_HAH
RAS_HP
RAS_D0
RAS_D1
RAS_D2
RAS_D3
ACNF
PCC
—
HCCR
PC33
PC66
PC100
PC133
Register Name
PCI-X Capabilities Identifier
Reserved
PCI-X Secondary Status
PCI-X Bridge Status
PCI-X Upstream Split Transaction Control
PCI-X Downstream Split Transaction
Control
RAS Status
Reserved
RAS Data Integrity Codes
Reserved
RAS PCI Header
Reserved
RAS PCI Address Low
RAS PCI Address High
RAS PCI Data Low 32 bits
RAS PCI Data High 32 bits
RAS Hub Interface Header
RAS Hub Interface Address Low 32 Bits
RAS Hub Interface Address High 32 Bits
RAS Hub Interface Prefetch Horizon
RAS Hub Interface DWord 0
RAS Hub Interface DWord 1
RAS Hub Interface DWord 2
RAS Hub Interface DWord 3
Additional P64H2 Configuration
PCI Compensation Control
Reserved
Hub Interface Command/Control
Prefetch Control for 33 MHz
Prefetch Control for 66 MHz
Prefetch Control for 100 MHz
Prefetch Control for 133 MHz
Default
07h
—
0003h
000100F8h/
000100E8h
0000FFFFh
0000FFFFh
xxxxxxh
—
xxxxxxh
—
xxxxh
—
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxh
0000000Fh
0000h
—
00000000h
1212h
3323h
7B7Bh
BFFFh
Access
RO
—
R/W
RO
R/W
R/W
R/W
—
RO
—
RO
—
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
—
R/W
R/W
R/W
R/W
R/W
Intel^® 82870P2 P64H2 Datasheet
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