English
Language : 

82870P2P64H2 Datasheet, PDF (17/217 Pages) –
Introduction
R
1
1.1
1.2
Introduction
The Intel® 82870P2 PCI/PCI-X 64 Hub 2 (P64H2) is a peripheral chip that performs PCI bridging
functions between hub interface and the PCI Bus. On the primary bus, the P64H2 utilizes a 16-bit
data bus to interface with the hub interface, and on the secondary bus the P64H2 supports two
64-bit PCI bus interfaces. Either one of the secondary PCI bus interfaces can be configured to
operate in PCI or PCI-X mode. Each PCI interface contains an I/O APIC with 24 interrupts and a
hot plug controller supporting each PCI bus segment.
Related Documents
Document
PCI Local Bus Specification, Revision 2.0
PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0
PCI Hot Plug Specification, Revision 1.0
PCI-to-PCI Bridge Architecture Specification, Revision 1.1
System Management Bus (SMBus) Specification, Revision 2.0
Doc Number / Location
http://www.pcisig.com/specifications
/conventional_pci
http://www.pcisig.com/specifications
/pci_x
http://www.pcisig.com/specifications
/pci_hot_plug
http://www.pcisig.com/specifications
/pci_to_pci_bridge_architecture
http://www.smbus.org/specs/
Intel® P64H2 Overview
Primary Bus (the Hub Interface)
The Primary bus is the hub interface between the MCH and P64H2. This 16-bit data interface
provides support for 32-bit and 64-bit addressing. The base clock is 66 MHz.
Secondary Bus (2 PCI Bus Interfaces)
The P64H2 has two PCI Bus interfaces (PCI Bus A and PCI Bus B). In this document these buses
are referred to as the secondary buses. These interfaces can be independently configured as either
a PCI Bus or PCI-X Bus. PCI Bus extensions are also provided. There is 64-bit addressing
outbound, with the capability to assert DAC. Full 64 bit addressing inbound is supported. The
inbound packet size is based on the cache line size of the platform.
I/O space can be programmed to 1 KB granularity. If inbound reads are retried, they will be moved
to the side so that posted writes and completion packets can pass. I/O reads and writes on PCI will
no longer be forwarded to the hub interface, nor will they be forwarded to the other PCI interface.
Intel® 82870P2 P64H2 Datasheet
17