82870P2P64H2 Datasheet, PDF (141/217 Pages) –

Functional Description
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The on/off state machine executes a shift for any of the following reasons:
• The SOGO bit was set by software (even if no slot enable bits have changed state).
• A Hot plug slot switch has opened (provided that the respective slot is on).
• At least one LED has been programmed to blink and the blink timer has expired.
• A PCI configuration space write to byte offset 43h after RSTIN# deassertion. (The system
ROM firmware usually does this early, after or while configuring the MCNF Register in
configuration space).
The LED control outputs are updated with a single pass through the output shift registers. The
PWREN, RESET#, CLKEN#, and BUSEN# bits, however, require multiple passes. The shift
sequence changes depending on which bits have been set or reset in the Slot Enable Register when
the SOGO bit is set:
• No Slot Enable bits have changed: The serial outputs are updated in a single pass.
• At least one Slot Enable bit has changed from 0 to 1 when SOGO is set: Executes a slot
enable sequence.
• At least one Slot Enable bit has changed from 1 to 0: Executes a slot disable sequence.
• Some Slot Enable bits have changed from 0 to 1 and some have changed from 1 to 0:
Executes two sequences – first a disable sequence then an enable sequence.
The SOGO bit can be configured to generate an interrupt when it changes from 1 to 0 through the
SOIE bit in the MCNF Register.
Intel^® 82870P2 P64H2 Datasheet
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